Intel IXP2800 and IXP2850 Network Processors
Signal Description
44
Datasheet
PCI
PCI_AD[31:0]
Low = Central
High = Non-Central
Central Function:
During PCI reset (PCI_RST_L =0), the
network processor needs to drive
PCI_AD[31:0] and PCI_BE[3:0],
PCI_PAR to low.The rest of the I/O
devices will be in three states.
After PCI_RST_L is deasserted, the
network processor will drive these I/O
devices (PCI_AD[31:0], PCI_BE[3:0],
and PCI_PAR) to three states unless
the network processor owns the grant.
Non-Central Function:
During PCI reset (PCI_RST_L =0), the
network processor needs to drive all of
the I/O devices to three states. Once
the network processor owns the bus
(grant), the network processor needs
to drive these I/O devices
PCI_AD[31:0], PCI_BE[3:0], and
PCI_PAR to known values.
PCI
PCI_AD[63:32]
High-Z
Need external pullup.
PCI
PCI_CBE_L[3:0]
Low = Central
High = Non-Central
Central Function:
During PCI reset (PCI_RST_L =0), the
network processor needs to drive PCI
AD[31:0] and PCI_BE[3:0], PCI_PAR
to low.The rest of the I/O devices will
be in three states.
After PCI_RST_L is deasserted, the
network processor will drive these I/O
devices (PCI_AD[31:0], PCI_BE[3:0],
and PCI_PAR) to three states unless
the network processor owns the grant.
Non-Central Function:
During PCI reset (PCI_RST_L =0), the
network processor needs to drive all
the I/O devices to three states. Once
the network processor owns the bus
(grant), the network processor needs
to drive these I/O devices
PCI_AD[31:0], PCI_BE[3:0], and
PCI_PAR to known values.
PCI
PCI_CBE_L7:4
High-Z
Need external pullup.
Table 17. Pin State During Reset (Sheet 2 of 4)
Function
Pin name
Initial Values
Comment