参数资料
型号: RX-4571LC
厂商: EPSON TOYOCOM CORP
元件分类: 时钟/数据恢复及定时提取
英文描述: REAL TIME CLOCK, PDSO12
封装: ROHS COMPLIANT, VSOJ-12
文件页数: 16/33页
文件大小: 723K
代理商: RX-4571LC
RX
4571 LC
Page - 20
ETM18E-04
13.2.2. Related registers for function of fixed-cycle timer interrupt function
Address [h]
Function
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
B
Timer Counter 0
128
64
32
16
8
4
2
1
C
Timer Counter 1
2048
1024
512
256
D
Extension Register
TEST1
WADA
TE
FSEL1
FSEL0
TSEL1
TSEL0
E
Flag Register
TEST2
TF
AF
VLF
RSV
F
Control Register
TEST3
TIE
AIE
STOP
Before entering operation settings, we recommend first clearing the TE bit to "0" and then clearing the TF
and TIE bits to "0" in that order, so that all control-related bits are zero-cleared (= set to operation stop mode) to
prevent hardware interrupts from occurring inadvertently while entering settings.
When the fixed-cycle timer interrupt function is not being used, the fixed-cycle timer control register (Reg – 0B to
0C) can be used as a RAM register. In such cases, stop the fixed-cycle timer function by writing "0" to the TE and
TIE bits.
1) TSEL1, TESL0 bits ( Timer Select 1, 0 )
The combination of these two bits is used to set the countdown period (source clock) for the fixed-cycle
timer interrupt function (four settings can be made).
TSEL1, 0
TSEL1
( bit 1 )
TSEL0
( bit 0 )
Source clock
Auto reset time
tRTN
Effects of STOP and
RESET bits
0
4096 Hz /Once per 244.14
μs
122
μs
0
1
64 Hz /Once per 15.625 ms
7.813 ms
1
0
1 Hz /Once per second
7.813 ms
W / R
1
1/60 Hz /Once per minute
7.813 ms
Does not operate when
the STOP bit or RESET
bit value is "1".
1) The /IRQ pin's auto reset time (tRTN) varies as shown above according to the source clock setting.
2) An interrupt that occurs when the source clock is in 1 Hz mode is not linked to the internal clock.
3) An interrupt that occurs when the source clock is in 1/60 Hz mode is linked to the internal clock's
"minute" update operation.
2) Down counter for fixed-cycle timer ( Timer Counter 1, 0 )
This register is used to set the default (preset) value for the counter. Any count value from 1 (001 h) to
4095 (FFFh) can be set. The counter counts down based on the source clock's period, and when the count
value changes from 001h to 000h, the TF bit value becomes "1".
The countdown that starts when the TE bit value changes from "0" to "1" always begins from the preset
value.
Be sure to write "0" to the TE bit before writing the preset value. If a value is written while TE = "1" the first
subsequent event will not be generated correctly.
Address 0C
Timer Counter 1
Address 0B
Timer Counter 0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
2048
1024
512
256
128
64
32
16
8
4
2
1
When TE=1, read out data of timer counter is default(Preset) value.
And when TE=0, read out data of timer counter is just counting value.
But , when access to timer counter data, counting value is not held.
Therefore, for example, perform twice read access to obtain right data, and a way to adopt the case that
two data accorded is necessary.
You can use timer registers as RAM, when you do not use timer functions.
In this case, clear the TE and TIE, should stop the timer interrupt function.
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