
RX
4571 LC
Page - 2
ETM18E-04
3. Terminal description
3.1. Terminal connections
RX
4571 LC
1. FOE
12. VDD
2. N.C.
11. N.C.
3. DIO
10. N.C.
4. CLK
9. N.C.
5. CE
8. /IRQ
6. GND
# 1
# 6
# 12
# 7
7. FOUT
VSOJ
12pin
3.2. Pin Functions
Signal
name
I/O
Function
CE
Input
This is the chip enabled input pin. It has a built-in pull-down resistance.
When both CE pin is at the "H" level, access to this RTC becomes possible.
CLK
Input
This is a shift clock input pin for serial data transmission.
In the write mode, it takes in data from the DIO pin using the CLK signal rise edge.
In the read mode, it outputs data from the DIO pin using the fall edge.
DIO
Bi-directional
This is a data input/output pin for serial data transmission.
After the input rise of CE, by using the first 8-bit write data to set the write or read mode,
this pin can be set as either input pin or output pin.
FOUT
Output
FOE
Input
The FOUT pin is a clock output (C-MOS output) pin with control output.
The FOE pin is an input pin used to control the output mode of the FOUT output pin.
The FOE input pin can be used in combination with the FSEL1 bit and FSEL0 bit to select
the output frequency from the FOUT output pin (32.768 kHz, 1024 Hz, or 1 Hz) or to stop
output. When output is stopped, the CLKOUT output pin is at high impedance.
FOE pin
input
FSEL1
bit
FSEL0
bit
FOUT pin
output
0
32768 Hz Output
( C-MOS output )
0
1
1024 Hz Output
( C-MOS output )
Χ
( Don't care )
1
0
1 Hz Output
( C-MOS output )
" H "
1
32768 Hz Output
( C-MOS output )
" L "
1
OFF
( high impedance )
During the initial power-on (when power is applied from 0 V), if the FOE input pin is at
high level (= H), the power-on reset function selects 32.768 kHz as the frequency.
/ IRQ
Output
This pin outputs alarm signals, fixed timer interrupt signals, and other interrupt signals at low
level ( = " L " ). This pin is an open drain pin.
VDD
-
This pin connects to the plus side of the power.
GND
-
This pin connects to the minus side (ground) of the power.
N.C.
-
This pin is not connected internally. Be sure to connect using OPEN, or GND or VDD.
Note : Be sure to connect a bypass capacitor rated at least 0.1 μF between VDD and GND.