参数资料
型号: S1C63158B0A010R
元件分类: 微控制器/微处理器
英文描述: 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, PBGA
文件页数: 71/159页
文件大小: 1200K
代理商: S1C63158B0A010R
S1C63808 TECHNICAL MANUAL
EPSON
11
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
2.2.5 Terminal settings at initial resetting
The output port (R) terminals and I/O port (P) terminals are shared with special output terminals and
input/output terminals of the serial interface. These functions are selected by the software. At initial
reset, these terminals are set to the general purpose output port terminals and I/O port terminals. Set
them according to the system in the initial routine. In addition, take care of the initial status of output
terminals when designing a system.
Table 2.2.5.1 shows the list of the shared terminal settings.
Table 2.2.5.1 List of shared terminal settings
Terminal
name
R00
R01
R02
R03
R10–R13
P00–P03
P10
P11
P12
P13
P20
P21
P22
P23
P30–P33
P40–P43
Terminal status
at initial reset
R00
(LOW output)
R01
(LOW output)
R02
(LOW output)
R03
(LOW output)
R10–R13 (LOW output)
P00–P03 (Input & pulled down
)
P10
(Input & pulled down
)
P11
(Input & pulled down
)
P12
(Input & pulled down
)
P13
(Input & pulled down
)
P20
(Input & pulled down
)
P21
(Input & pulled down
)
P22
(Input & pulled down
)
P23
(Input & pulled down
)
P30–P33 (Input & pulled down
)
P40–P43 (Input & pulled down
)
When "With Pull-Down" is selected by mask option (high impedance when "Gate Direct" is selected)
Serial I/F
Special output
BZ
R00
BZ
R10–R13
P00–P03
P30–P33
P40–P43
TOUT
R00
TOUT
R10–R13
P00–P03
P30–P33
P40–P43
FOUT
R00
FOUT
R10–R13
P00–P03
P30–P33
P40–P43
Clk-sync. Master
R00
R10–R13
P00–P03
SIN1(I)
SOUT1(O)
SCLK1(O)
P13
SIN2(I)
SOUT2(O)
SCLK2(O)
P23
P30–P33
P40–P43
Clk-sync. Slave
R00
R10–R13
P00–P03
SIN1(I)
SOUT1(O)
SCLK1(I)
SRDY1(O)
SIN2(I)
SOUT2(O)
SCLK2(I)
SRDY2(O)
P30–P33
P40–P43
Async.
R00
R10–R13
P00–P03
SIN1(I)
SOUT1(O)
P12
P13
SIN2(I)
SOUT2(O)
P22
P23
P30–P33
P40–P43
For setting procedure of the functions, see explanations for each of the peripheral circuits.
2.3 Test Terminal (TEST)
This is the terminal used for the factory inspection of the IC. During normal operation, connect the TEST
terminal to VSS.
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