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参数资料
| 型号： | S1C7XXXF00E10C |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, 90 MHz, RISC MICROCONTROLLER, PQFP |
| 文件页数： | 138/196页 |
| 文件大小： | 1650K |
| 代理商： | S1C7XXXF00E10C |
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5 INSTRUCTION SET
5-20
EPSON
S1C17 FAMILY S1C17 CORE MANUAL
0 0
0
imm13
imm7
imm7 with one ext
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0
23
20 19
7
imm7
6
0
imm7 with no ext
imm13(3:0)
imm13'
imm7
imm7 with two ext
X
0
Branch destination address
PC
jpa imm7
(3) PC relative call instructions
The PC relative call instruction call sign10/%rb is a subroutine call instruction that is useful for relocat-
able programming, as it causes the program to unconditionally branch to a subroutine starting from an address
calculated as PC + 2 (the next address of the branch instruction) + signed displacement (specified by the oper-
and). During branching, the program saves the address of the instruction next to the call instruction (for de-
layed branching, the address of the second instruction following call) to the stack as the return address. When
the ret instruction is executed at the end of the subroutine, this address is loaded into the PC, and the program
returns to it from the subroutine.
Note that because the instruction length is fixed to 16 bits, the least significant bit of the displacement is always
handled as 0 (sign10 doubled, rb is not doubled), causing the program to branch to an even address.
As with the PC relative jump instructions, the specifiable displacement can be extended by the ext instruction.
For details on how to extend the displacement, refer to the “(1) PC relative jump instructions.”
(4) Absolute call instructions
The absolute call instruction calla causes the program to unconditionally call a subroutine starting from the
location indicated by the content of a specified general-purpose register (rb) or an immediate imm7 (can be ex-
tended to imm20 or imm24 using the ext instruction) as the absolute address. When the content of the rb regis-
ter or the immediate is loaded into the PC, its least significant bit is always made 0. (Refer to the “(2) Absolute
jump instructions.”)
(5) Software interrupts
The software interrupts int and intl are the instructions that cause the software to generate an interrupt with
the vector numbers specified by the operand imm5, by which a specified interrupt handler routine can be ex-
ecuted. When a software interrupt occurs, the processor saves the PSR and the instruction address next to int/
intl to the stack, and reads the specified vector from the vector table in order to execute an interrupt handler
routine. Therefore, to return from the interrupt handler routine, the reti instruction must be used, as it restores
the PSR as well as the PC from the stack. For details on the software interrupt, refer to Section 6.3, “Interrupts.”
(6) Return instructions
The ret instruction, which is a return instruction for the call and calla instructions, loads the saved return
address from the stack into the PC as it terminates the subroutine. Therefore, the value of the SP when the ret
instruction is executed must be the same as when the subroutine was executed (i.e., one that indicates the return
address).
The reti instruction is a return instruction for the interrupt handler routine. Since the PSR is saved to the
stack along with the return address in interrupt handling, the content of the PSR must be restored from the stack
using the reti instruction. In the reti instruction, the PC and the PSR are read out of the stack in that order.
As in the case of the ret instruction, the value of the SP when the reti instruction is executed must be the
same as when the subroutine was executed.
(7) Debug interrupts
The brk and retd instructions are used to call a debug interrupt handler routine, and to return from that rou-
tine. Since these instructions are basically provided for the debug firmware, please do not use them in applica-
tion programs. For details on the functionality of these instructions, refer to Section 6.5, “Debug Circuit.”
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