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参数资料
| 型号： | S1D13600F00A |
| 元件分类： | 显示控制器 |
| 英文描述： | CRT OR FLAT PNL GRPH DSPL CTLR, PQFP64 |
| 封装： | QFP6-64 |
| 文件页数： | 21/29页 |
| 文件大小： | 190K |
| 代理商： | S1D13600F00A |
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S1D13600 Series
1–28
EPSON
Rev. 2.3
CPU Write Start Address
(1) This command sets the SRAM address which CPU Display Data can be stored.
(2) This command requires two bytes of data which follow this command.
(3) The order of two byte data is that the first data is lower byte and second data is higher byte.
(4) The two bytes of data are temporarily set to the internal CPU Write Address Counter by this command.
And the CPU Write Address Counter is increased by one, when CPU Display Data Write Access
occurs.
Display Refresh Start Address
command; DT/
CM = 0
D7
D6
D5
D4
D3
D2
D1
D0
00
00011
0
06H
data; DT/
CM = 1
WA7
WA6
WA5
WA4
WA3
WA2
WA1
WA1 data1
WA15 WA14 WA13 WA12 WA11 WA10 WA9
WA8 data2
command; DT/
CM = 0
D7
D6
D5
D4
D3
D2
D1
D0
00
00011
1
07H
data;
DT/
CM = 1
RA7
RA6
RA5
RA4
RA3
RA2
RA1
data1
RA15 RA14 RA13 RA12 RA11 RA10
RA9
RA8
data2
(1) This command sets the SRAM address which S1D13600 starts reading the data from, to transfer the
display data to the LCD Module in Active Mode.
(2) This command requires two bytes of data which follow this command.
(3) The order of two byte data is that the first data is lower byte and second data is higher byte.
(4) The two bytes of data are set to the internal Display Data Refresh Address Counter by this command.
Display ON/
OFF
command; DT/
CM = 0
D7
D6
D5
D4
D3
D2
D1
D0
10
00000
ON/
81H
OFF
80H
(1) This command controls “
DOFF” output.
(2) If the ON/
OFF is set to HIGH “DOFF” outputs HIGH. If the ON/OFF is set to LOW “DOFF” outputs
LOW.
(3) The ON/
OFF is set to LOW at the reset.
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