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参数资料
| 型号： | S29GL256N80TFIV10 |
| 厂商： | Spansion Inc. |
| 英文描述： | MirrorBit Flash Family |
| 中文描述： | MirrorBit闪存系列 |
| 文件页数： | 91/110页 |
| 文件大小： | 2624K |
| 代理商： | S29GL256N80TFIV10 |
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May 13, 2004 27631A4
S29GLxxxN MirrorBitTM Flash Family
81
Ad va nc e
Inform ati o n
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm
is in progress or complete, or whether the device has entered the Erase Suspend
mode. Toggle Bit I may be read at any address, and is valid after the rising edge
of the final WE# pulse in the command sequence (prior to the program or erase
operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cy-
cles to any address cause DQ6 to toggle. The system may use either OE# or CE#
to control the read cycles. When the operation is complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing
are protected, DQ6 toggles for approximately 100 s, then returns to reading
array data. If not all selected sectors are protected, the Embedded Erase algo-
rithm erases the unprotected sectors, and ignores the selected sectors that are
protected.
The system can use DQ6 and DQ2 together to determine whether a sector is ac-
tively erasing or is erase-suspended. When the device is actively erasing (that is,
the Embedded Erase algorithm is in progress), DQ6 toggles. When the device en-
ters the Erase Suspend mode, DQ6 stops toggling. However, the system must
also use DQ2 to determine which sectors are erasing or erase-suspended. Alter-
natively, the system can use DQ7 (see the subsection on DQ7: Data# Polling).
If a program address falls within a protected sector, DQ6 toggles for approxi-
mately 1 s after the program command sequence is written, then returns to
reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling
once the Embedded Program algorithm is complete.
Table 14 shows the outputs for Toggle Bit I on DQ6. Figure 6 shows the toggle bit
algorithm. Figure 18 in the “AC Characteristics” section shows the toggle bit tim-
ing diagrams. Figure 19 shows the differences between DQ2 and DQ6 in graphical
form. See also the subsection on DQ2: Toggle Bit II.
相关PDF资料 |
PDF描述 |
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| S29GL256N90TFIV10 | MirrorBit Flash Family |
| S29GL256N10TFIV10 | MirrorBit Flash Family |
| S29GL256N80FFIV10 | MirrorBit Flash Family |
| S29AL008D55TFNR11 | SSR OCMOS FET 350MA NO 8-DIP |
| S29AL008D70TFNR11 | 8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
相关代理商/技术参数 |
参数描述 |
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| S29GL256N90FFIR10 | 制造商:Spansion 功能描述:Flash Mem Parallel 3.3V 256M-Bit 32M x 8/16M x 16 90ns 64-Pin Fortified BGA Tray |
| S29GL256N90FFIR22 | 制造商:Spansion 功能描述: |
| S29GL256N90TFIR10 | 制造商:Spansion 功能描述:NOR Flash Parallel 3.3V 256Mbit 32M/16M x 8bit/16bit 90ns 56-Pin TSOP Tray 制造商:Spansion 功能描述:Flash - NOR IC |
| S29GL256N90TFIR2 | 制造商:Spansion 功能描述: |
| S29GL256N90TFIR20 | 制造商:Spansion 功能描述:Flash Mem Parallel 3.3V 256M-Bit 32M x 8/16M x 16 90ns 56-Pin TSOP Tray 制造商:Spansion 功能描述:Flash - NOR IC |
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