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参数资料
| 型号： | S80296SA40 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, 40 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | QFP-100 |
| 文件页数： | 9/40页 |
| 文件大小： | 1096K |
| 代理商： | S80296SA40 |
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PRELIMINARY
13
80296SA COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
5.0
ADDRESS MAP
Table 5. 80296SA Address Map
Hex
Address
Description (Note 1, Note 2)
Addressing Modes for
Data Accesses
FFFFFF
FFF800
External device (memory or I/O) in 1-Mbyte mode (CCB1.1=0)
A copy of internal code RAM in 64-Kbyte mode (CCB1.1=1)
Extended
FFF7FF
FF2080
External program memory (Note 3)
Extended
FF207F
FF2000
External special-purpose memory (CCBs and interrupt vectors)
Extended
FF1FFF
FF0400
External device (memory or I/O) connected to address/data bus
Extended
FF03FF
FF0000
Reserved for in-circuit emulators
—
FEFFFF
0F0000
Overlaid memory (reserved for future devices);
locations
xF0000–xF03FFH are reserved for in-circuit emulators
—
0EFFFF
010000
External device (memory or I/O) connected to address/data bus
Extended
00FFFF
00F800
Internal code RAM (code or data); can be windowed by WSR1. In
64-Kbyte mode, code RAM is identically mapped into page FFH.
Indirect, indexed, extended,
windowed direct
00F7FF
00F000
External device (memory or I/O) connected to address/data bus;
can be windowed by WSR1
Indirect, indexed, extended,
windowed direct
00EFFF
002000
External device (memory or I/O) connected to address/data bus
Indirect, indexed, extended
001FFF
001F00
Internal peripheral special-function registers (SFRs);
can be windowed by WSR or WSR1
Indirect, indexed, extended,
windowed direct
001EFF
001C00
Reserved (future SFR expansion)
—
001BFF
000400
External device (memory or I/O) connected to address/data bus
Indirect, indexed, extended
0003FF
000200
Reserved (future register file expansion)
—
0001FF
000100
Upper register file (general-purpose register RAM)
can be windowed by WSR or WSR1
Indirect, indexed, extended
windowed direct
0000FF
00001A
Lower register file (general-purpose register RAM)
Direct, indirect, indexed,
extended
000019
000000
Lower register file (stack pointer and CPU SFRs)
Direct
NOTES:
1.
Unless otherwise noted, write 0FFH to reserved memory locations and write 0 to reserved SFR bits.
2.
The contents or functions of reserved locations may change in future device revisions, in which case a
program that relies on one or more of these locations might not function properly.
3.
External memory occupies the boot memory partition, FF2080–FF7FFH. After reset, the default chip-
select line (CS0#) is active; the first instruction fetch is from FF2080H.
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