- 您现在的位置：买卖IC网 > PDF目录98078 > SC16C550IB48,128 (NXP SEMICONDUCTORS) 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP48 PDF资料下载
参数资料
| 型号： | SC16C550IB48,128 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP48 |
| 封装： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48 |
| 文件页数： | 50/52页 |
| 文件大小： | 639K |
| 代理商： | SC16C550IB48,128 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页当前第50页第51页第52页
Philips Semiconductors
SC16C550
UART with 16-byte FIFO and IrDA encoder/decoder
Product data
Rev. 05 — 19 June 2003
7 of 52
9397 750 11619
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
CS0, CS1,
CS2
14, 15,
16
9, 10,
11
12, 13,
14
I
Chip select. When CS0 and CS1 are HIGH and CS2 is LOW, these
three inputs select the UART. When any of these inputs are inactive,
the UART remains inactive (refer to AS description).
CTS
40
38
36
I
Clear to send. CTS is a modem status signal. Its condition can be
checked by reading bit 4 (CTS) of the modem status register. Bit 0
(CTS) of the modem status register indicates that CTS has changed
states since the last read from the modem status register. If the
modem status interrupt is enabled when CTS changes levels and the
auto-CTS mode is not enabled, an interrupt is generated. CTS is also
used in the auto-CTS mode to control the transmitter.
D7-D0
2-9
43-47,
2-4
8-1
I/O
Data bus. Eight data lines with 3-State outputs provide a bi-directional
path for data, control and status information between the UART and
the CPU.
DCD
42
40
38
I
Data carrier detect. DCD is a modem status signal. Its condition can
be checked by reading bit 7 (DCD) of the modem status register. Bit 3
(DCD) of the modem status register indicates that DCD has changed
states since the last read from the modem status register. If the
modem status interrupt is enabled when DCD changes levels, an
interrupt is generated.
DDIS
26
22
23
O
Driver disable. DDIS is active (LOW) when the CPU is not reading
data. When active, DDIS can disable an external transceiver.
DSR
41
39
37
I
Data set ready. DSR is a modem status signal. Its condition can be
checked by reading bit 5 (DSR) of the modem status register. Bit 1
(DSR) of the modem status register indicates DSR has changed levels
since the last read from the modem status register. If the modem
status interrupt is enabled when DSR changes levels, an interrupt is
generated.
DTR
37
33
O
Data terminal ready. When active (LOW), DTR informs a modem or
data set that the UART is ready to establish communication. DTR is
placed in the active level by setting the DTR bit of the modem control
register. DTR is placed in the inactive level either as a result of a
Master Reset, during loop mode operation, or clearing the DTR bit.
INT
33
30
O
Interrupt. When active (HIGH), INT informs the CPU that the UART
has an interrupt to be serviced. Four conditions that cause an interrupt
to be issued are: a receiver error, received data that is available or
timed out (FIFO mode only), an empty transmitter holding register or
an enabled modem status interrupt. INT is reset (deactivated) either
when the interrupt is serviced or as a result of a Master Reset.
MR
39
35
I
Master Reset. When active (HIGH), MR clears most UART registers
and sets the levels of various output signals.
NC
1, 12,
23, 34
1, 5, 13,
21, 25,
36, 37,
48
-
Not connected.
OUT1, OUT2 38, 35
34, 31
O
Outputs 1 and 2. These are user-designated output terminals that are
set to the active (low) level by setting respective modem control
register (MCR) bits (OUT1 and OUT2). OUT1 and OUT2 are set to
inactive the (HIGH) level as a result of Master Reset, during loop mode
operations, or by clearing bit 2 (OUT1) or bit 3 (OUT2) of the MCR.
Table 2:
Pin description…continued
Symbol
Pin
Type
Description
PLCC44 LQFP48 DIP40
相关PDF资料 |
PDF描述 |
|---|---|
| SC16C654IB64,128 | 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP64 |
| SC16C654IA68,512 | 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC68 |
| SC18005CQ | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP144 |
| SC18IS600IBS,151 | I2C BUS CONTROLLER, PQCC24 |
| SC18IS600IBS | I2C BUS CONTROLLER, PQCC24 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SC16C550IN40 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Universal Asynchronous Receiver/Transmitter (UART) with 16-byte FIFO and infrared (IrDA) encoder/decoder |
| SC16C550IN40,112 | 功能描述:IC UART SINGLE W/FIFO 40-DIP RoHS:是 类别:集成电路 (IC) >> 接口 - UART（通用异步接收器/发送器） 系列:- 标准包装:250 系列:- 特点:* 通道数:2，DUART FIFO's:16 字节 规程:RS232，RS485 电源电压:2.25 V ~ 5.5 V 带并行端口:- 带自动流量控制功能:是 带IrDA 编码器/解码器:是 带故障启动位检测功能:是 带调制解调器控制功能:是 带CMOS:是 安装类型:表面贴装 封装/外壳:48-TQFP 供应商设备封装:48-TQFP（7x7） 包装:托盘 其它名称:XR16L2551IM-F-ND |
| SC16C554 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder |
| SC16C554B | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs |
| SC16C554B_10 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs |
发布紧急采购，3分钟左右您将得到回复。