参数资料
型号: SC16IS752IPW,112
厂商: NXP Semiconductors
文件页数: 27/60页
文件大小: 0K
描述: IC UART DUAL 12C/SPI 28TSSOP
产品培训模块: Stand-Alone UARTs
I²C Bus Fundamentals
特色产品: NXP - I2C Interface
标准包装: 51
特点: 低电流
通道数: 2,DUART
FIFO's: 64 字节
规程: RS232,RS485
电源电压: 2.5V, 3.3V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 管件
产品目录页面: 828 (CN2011-ZH PDF)
配用: 568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
其它名称: 568-4016-5
935279292112
SC16IS752IPW
SC16IS752IPW-ND
SC16IS752_SC16IS762
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 9 — 22 March 2012
33 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
8.21 Enhanced Features Register (EFR)
This 8-bit register enables or disables the enhanced features of the UART. Table 31
shows the Enhanced Features Register bit settings.
9.
RS-485 features
9.1 Auto RS-485 RTS control
Normally the RTS pin is controlled by MCR bit 1, or if hardware flow control is enabled, the
logic state of the RTS pin is controlled by the hardware flow control circuitry. EFCR
register bit 4 will take the precedence over the other two modes; once this bit is set, the
transmitter will control the state of the RTS pin. The transmitter automatically asserts the
RTS pin (logic 0) once the host writes data to the transmit FIFO, and de-asserts RTS pin
(logic 1) once the last bit of the data has been transmitted.
To use the auto RS-485 RTS mode the software would have to disable the hardware flow
control function.
9.2 RS-485 RTS output inversion
EFCR bit 5 reverses the polarity of the RTS pin if the UART is in auto RS-485 RTS mode.
When the transmitter has data to be sent it de-asserts the RTS pin (logic 1), and when the
last bit of the data has been sent out the transmitter asserts the RTS pin (logic 0).
Table 31.
Enhanced Features Register bits description
Bit
Symbol
Description
7
EFR[7]
CTS flow control enable.
logic 0 = CTS flow control is disabled (normal default condition)
logic 1 = CTS flow control is enabled. Transmission will stop when a
HIGH signal is detected on the CTS pin.
6
EFR[6]
RTS flow control enable.
logic 0 = RTS flow control is disabled (normal default condition)
logic 1 = RTS flow control is enabled. The RTS pin goes HIGH when
the receiver FIFO halt trigger level TCR[3:0] is reached, and goes
LOW when the receiver FIFO resume transmission trigger level
TCR[7:4] is reached.
5
EFR[5]
Special character detect.
logic 0 = special character detect disabled (normal default condition)
logic 1 = special character detect enabled. Received data is compared
with Xoff2 data. If a match occurs, the received data is transferred to
FIFO and IIR[4] is set to a logical 1 to indicate a special character has
been detected.
4
EFR[4]
Enhanced functions enable bit.
logic 0 = disables enhanced functions and writing to IER[7:4],
FCR[5:4], MCR[7:5].
logic 1 = enables the enhanced function IER[7:4], FCR[5:4], and
MCR[7:5] so that they can be modified.
3:0
EFR[3:0]
Combinations of software flow control can be selected by programming
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SC16IS752IPW-T 功能描述:IC UART DUAL I2C/SPI 28-TSSOP RoHS:是 类别:集成电路 (IC) >> 接口 - UART(通用异步接收器/发送器) 系列:- 标准包装:250 系列:- 特点:* 通道数:2,DUART FIFO's:16 字节 规程:RS232,RS485 电源电压:2.25 V ~ 5.5 V 带并行端口:- 带自动流量控制功能:是 带IrDA 编码器/解码器:是 带故障启动位检测功能:是 带调制解调器控制功能:是 带CMOS:是 安装类型:表面贴装 封装/外壳:48-TQFP 供应商设备封装:48-TQFP(7x7) 包装:托盘 其它名称:XR16L2551IM-F-ND
SC16IS760 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support