参数资料
型号: SC202MLTRT
厂商: Semtech
文件页数: 12/19页
文件大小: 0K
描述: CONVERTER DC/DC 3.3V OUT 500MA
标准包装: 1
系列: SC202
类型: 非隔离(POL)
输出数: 1
电压 - 输入(最小): 2.9V
电压 - 输入(最大): 5.5V
Voltage - Output 1: 0.8 ~ 3.3 V
电流 - 输出(最大): 500mA
电源(瓦) - 制造商系列: 1.65W
安装类型: 表面贴装
封装/外壳: 13-VFQFN 裸露焊盘
尺寸/尺寸: 0.12" L x 0.10" W x 0.04" H(3.0mm x 2.5mm x 1.0mm)
包装: 标准包装
工作温度: -40°C ~ 85°C
电源(瓦特)- 最大: 1.65W
其它名称: SC202MLDKR
NOT RECOMMENDED FOR NEW DESIGN
Applications Information
SC202
General Description
The SC202 is a synchronous step-down PWM (Pulse Width
Modulated) DC-DC regulator utilizing a 3.5MHz fixed-fre-
quency voltage-mode architecture and an internal 1μH
inductor. The device is designed to operate in fixed-fre-
quency PWM mode and enter PSAVE (power save) mode
utilizing pulse frequency modulation under light load
conditions to maximize efficiency. Two capacitors are the
only external components required — one for input
decoupling and one for output filtering. The output
voltage is programmable, eliminating the need for exter-
nal programming resistors. Loop compensation is also
internal, eliminating the need for external components to
control stability.
ment for systems that reduce the supply voltage when
entering sleep states. Note that applying all zeros to the
CTL pins when changing the output voltage will tempo-
rarily disable the device, so it is important to avoid this
combination when dynamically changing levels.
Adjustable Output Voltage Selection
If an output voltage other than one of the 15 program-
mable settings is needed, an external resistor divider
network can be added to the SC202 to adjust the output
voltage setting. This network scales the output based on
the resistor ratio and the programmed output setting.
The resistor values can be determined using the
equation
Programmable Output Voltage
The SC202 has 15 fixed output voltage levels which can be
V OUT
V SET
R FB1 R FB 2
R FB 2
I SNS R FB 1
individually selected by programming the CTL control
pins (CTL3-0 — see Table 1 on page 2 for settings). The
device is disabled whenever all four CTL pins are pulled
low and enabled whenever at least one of the CTL pins is
pulled high. This configuration eliminates the need for a
dedicated enable pin. Each CTL pin is internally pulled
down via 1MΩ if V IN is below 1.5V or if the voltage on the
control pin is below the input high voltage. This ensures
that the output is disabled when power is applied if there
are no inputs to the CTL pins. Each weak pull-down is dis-
abled whenever its pin is pulled high and remains disabled
until all CTL pins are pulled low.
where V OUT is the desired output voltage, V SET is the voltage
setting selected by the CTL pins, R FB1 is the resistor
between the output capacitor and the SNS pin, R FB2 is the
resistor between the SNS pin and ground, and I SNS is the
leakage current into the SNS pin during normal opera-
tion. The current into the SNS pin is typically 1μA, so the
last term of the equation can be neglected if the current
through R FB2 is much larger than 1μA. Selecting a resistor
value of 10kΩ or lower will simplify the design. If I SNS is
neglected and R FB2 is fixed, R FB1 can be determined using
the equation
The output voltage can be set using different approaches.
If a static output voltage is required, the CTL pins can be
R FB 1
R FB 2
V OUT V SET
V SET
tied to either IN or GND to set the desired voltage when-
ever power is applied at IN. If enable control is required,
each CTL pin can be tied to either GND or to a micropro-
cessor I/O line to create the desired control code whenever
the control signal is forced high. This approach is equiva-
lent to using the CTL pins collectively as a single enable
pin. A third option is to connect each of the four CTL pins
to individual microprocessor I/O lines. Any of the 15
Inserting resistance in the feedback loop will adversely
affect the system’s transient performance if feed-forward
capacitance is not included in the circuit. The circuit in
Figure 1 illustrates how the resistor divider and feed-
forward capacitor can be added to the SC202 schematic.
The value of feed-forward capacitance needed can be
determined using the equation
V SET V OUT
0 . 5
outputvoltagescanbeprogrammedusingthisapproach.
If only two output voltages are needed, the CTL pins can
be combined in a way that will reduce the number of I/O
C FF
4 10
6
R FB 1
V OUT V SET V SET
2
0 . 5
lines to 1, 2, or 3, depending on the control code for each
desired voltage. Other CTL pins could be hard-wired to
GND or IN. This option allows dynamic voltage adjust-
12
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