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参数资料
| 型号： | SC202MLTRT |
| 厂商： | Semtech |
| 文件页数： | 13/19页 |
| 文件大小： | 0K |
| 描述： | CONVERTER DC/DC 3.3V OUT 500MA |
| 标准包装： | 1 |
| 系列： | SC202 |
| 类型： | 非隔离（POL） |
| 输出数： | 1 |
| 电压 - 输入（最小）： | 2.9V |
| 电压 - 输入（最大）： | 5.5V |
| Voltage - Output 1： | 0.8 ~ 3.3 V |
| 电流 - 输出（最大）： | 500mA |
| 电源（瓦） - 制造商系列： | 1.65W |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 13-VFQFN 裸露焊盘 |
| 尺寸/尺寸： | 0.12" L x 0.10" W x 0.04" H（3.0mm x 2.5mm x 1.0mm） |
| 包装： | 标准包装 |
| 工作温度： | -40°C ~ 85°C |
| 电源（瓦特）- 最大： | 1.65W |
| 其它名称： | SC202MLDKR |
NOT RECOMMENDED FOR NEW DESIGN
Applications Information (continued)
SC202
V IN
C IN
IN
SC202
OUT
C OUT
C FF
V OUT
LX pin. The duty cycle (percentage of time PMOS is
active) increases as V IN decreases to maintain output
voltage regulation. As the input voltage approaches the
programmed output voltage, the duty cycle approaches
100% (PMOS always on) and the device enters a pass-
CTL3
CTL2
SNS
R FB1
through mode until the input voltage increases or the
load decreases enough to allow PWM switching to
Enable
CTL1
CTL0
GND
R FB2
resume.
Power Save Mode Operation
Figure 1 – Application Circuit with External Resistors
To simplify the design, it is recommended to program the
output setting to 1.0V, use resistor values smaller than
10kΩ, and include a feed-forward capacitance calculated
with the previous equation. If the output voltage is set to
1.0V, the previous equation reduces to
When the load current decreases below the PSAVE
threshold, PWM switching stops and the device auto-
matically enters PSAVE mode. This threshold varies
depending on the input voltage and output voltage
setting, optimizing efficiency for all possible load currents
in PWM or PSAVE mode. While in PSAVE mode, output
voltage regulation is controlled by a series of switching
bursts. During a burst, the inductor current is limited to a
V OUT
0 . 5
C FF
8 10
6
2
R FB 1 V OUT 1
peak value which controls the on-time of the PMOS
switch. After reaching this peak, the PMOS switch is dis-
abled and the inductor current decreases to near 0mA.
Switching bursts continue until the output voltage climbs
Example:
An output voltage of 1.3V is desired, but this is not a pro-
grammable option. What external component values for
Figure 1 are needed?
Solution: To keep the circuit simple, set R FB2 to 10kΩ so
current into the SNS pin can be neglected and set the
CTL3-0 pins to 0010 (1.0V setting). The necessary compo-
nent values for this situation are
to V OUT +2.5% or until the PSAVE current limit is reached.
Switching is then stopped to eliminate switching losses,
enhancing overall efficiency. Switching resumes when
the output voltage reaches the lower threshold of V OUT
and continues until the upper threshold again is reached.
Note that the output voltage is regulated hysteretically
while in PSAVE mode between V OUT and V OUT + 2.5%. The
period and duty cycle while in PSAVE mode are solely
determined by V IN and V OUT until PWM mode resumes. This
can result in the switching frequency being much lower
V OUT V SET
V SET
V OUT
0 . 5
R FB1
C FF
R FB 2
8 10
6
R FB 1 V OUT 1
3 k
2
5 . 69 nF
than the PWM mode frequency.
If the output load current increases enough to cause V OUT
to decrease below the PSAVE exit threshold (V OUT -2%),
the device automatically exits PSAVE and operates in
continuous PWM mode. Note that the PSAVE high and
PWM Operation
Normal PWM operation occurs when the output load
current exceeds the PSAVE threshold. In this mode, the
low threshold levels are both set at or above V OUT to mini-
mize undershoot when the SC202 exits PSAVE. Figure 2
illustrates the transitions from PWM mode to PSAVE
mode and back to PWM mode.
PMOS high side switch is activated with the duty cycle
required to produce the output voltage programmed by
the CTL pins. An internal synchronous NMOS rectifier
eliminates the need for an external Schottky diode on the
13
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