参数资料
| 型号： | SC470ITSTRT |
| 厂商： | Semtech |
| 文件页数： | 8/31页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 14-TSSOP |
| 标准包装： | 1 |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 电源电压： | 5 V ~ 5.5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 14-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 标准包装 |
| 产品目录页面： | 1358 (CN2011-ZH PDF) |
| 其它名称： | SC470ITSDKR |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页
POWER MANAGEMENT
Application Information
NOT RECOMMENDED FOR NEW DESIGN
SC470
+5V Bias Supplies
The SC470 requires an external +5V bias supply in
addition to the battery. If stand-alone capability is
required, the +5V supply can be generated with an
external linear regulator such as the Semtech LP2951.
an internal on-time capacitor. The on-time is the time
required for the voltage on this capacitor to charge from
zero volts to VOUT, thereby making the on-time of the
high-side switch directly proportional to output voltage
and inversely proportional to input voltage. This
implementation results in a nearly constant switching
frequency without the need for a clock generator.
For optimal operation, the controller has its own ground
t ON = 3 . 3 x 10 ? 12 ? ( R TON + 37 x 10 ) ? ? ? OUT ? ? + 50 ns
t ON = 0 . 85 ? 3 . 3 x 10 ? 12 ? ( R TON + 37 x 10 ) ? ? ? OUT ? ? + 50 ns
reference, VSSA, which should be tied by a single trace
to PGND at the negative terminal of the output
capacitor (see Layout Guidelines). All external compo-
nents referenced to VSSA in the Typical Applications Cir-
cuit on Page 1 should be connected to VSSA. The supply
decoupling capacitor should be tied directly between the
VCCA and VSSA pins. A 10 ? resistor should be used to
decouple VCCA from the main VDDP supply. PGND can
then be a separate plane which is not used for routing
traces. All PGND connections are connected directly to
the ground plane with special attention given to avoiding
indirect connections which may create ground loops. As
mentioned above, VSSA must be connected to the PGND
plane at the negative terminal of the output capacitor
only . The VDDP input provides power to the upper and
lower gate drivers. A decoupling capacitor is required.
No series resistor between VDDP and 5V is required. See
Layout Guidelines for more details.
Pseudo-Fixed Frequency Constant On-Time PWM
Controller
The PWM control architecture consists of a constant on-
time, pseudo-fixed frequency PWM controller (see Figure
1, Block Diagram, page 7). The output ripple voltage
developed across the output filter capacitor ’s ESR
provides the PWM ramp signal eliminating the need for a
current sense resistor. The high-side switch on-time is
determined by a one-shot whose period is directly
proportional to output voltage and inversely proportional
to input voltage. A second one-shot sets the minimum
off-time which is typically 400ns.
On-Time One-Shot (t ON )
The on-time one-shot comparator has two inputs. One
input looks at the output voltage, while the other input
samples the input voltage and converts it to a current.
This input voltage-proportional current is used to charge
For VOUT < 3.3V:
3 ? V ?
? V BAT ?
For 3.3V ≤ VOUT ≤ 5V:
3 ? V ?
? V BAT ?
R TON is a resistor connected from the input supply (VBAT)
to the TON pin. Due to the high impedance of this
resistor, the TON pin should always be bypassed to VSSA
using a 1nF ceramic capacitor.
Enable & Psave
The EN/PSV pin enables the supply. When EN/PSV is
tied to VCCA the controller is enabled and power save
will also be enabled. When the EN/PSV pin is tri-stated,
an internal pull-up will activate the controller and power
save will be disabled. If PSAVE is enabled, the SC470
PSAVE comparator will look for the inductor current to
cross zero on eight consecutive switching cycles by
comparing the phase node (LX) to PGND. Once observed,
the controller will enter power save and turn off the low
side MOSFET when the current crosses zero. To improve
light-load efficiency and add hysteresis, the on-time is
increased by 50% in power save. The efficiency
improvement at light-loads more than offsets the
disadvantage of slightly higher output ripple. If the
inductor current does not cross zero on any switching
cycle, the controller will immediately exit power save.
Since the controller counts zero crossings, the converter
can sink current as long as the current does not cross
zero on eight consecutive cycles. This allows the output
voltage to recover quickly in response to negative load
steps even when PSAVE is enabled.
? 2005 Semtech Corp.
8
www.semtech.com
相关PDF资料 |
PDF描述 |
|---|---|
| SC493ULTRT | IC REG CTRLR BUCK PWM MLPQ-20 |
| SC553ISKTRT | IC REG LDO ADJ .15A SOT-23-5 |
| SC560GULTRT | IC REG LDO 2.8V/1.5V .3A 8-MLPQ |
| SC630AULTRT | IC REG SWITCHED CAP 3.3V 8MLPD |
| SC632AULTRT | IC REG SWITCHED CAP 5V 8MLPD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SC471 | 制造商:SEMTECH 制造商全称:Semtech Corporation 功能描述:Synchronous Buck Controller with Multi-Level VOUT Transition Support |
| SC471_08 | 制造商:SEMTECH 制造商全称:Semtech Corporation 功能描述:Synchronous Buck Controller with Multi-Level VOUT Transition Support |
| SC471A | 制造商:SEMTECH 制造商全称:Semtech Corporation 功能描述:Synchronous Buck Controller with Multi-Level VOUT Transition Support |
| SC471AEVB | 制造商:SEMTECH 制造商全称:Semtech Corporation 功能描述:Synchronous Buck Controller with Multi-Level VOUT Transition Support |
| SC471AMLTRT | 制造商:SEMTECH 制造商全称:Semtech Corporation 功能描述:Synchronous Buck Controller with Multi-Level VOUT Transition Support |
发布紧急采购，3分钟左右您将得到回复。