参数资料
型号: SE97BTP,547
厂商: NXP Semiconductors
文件页数: 20/53页
文件大小: 386K
描述: IC TEMP SENSOR DIMM 8HWSON
产品培训模块: I²C Bus Fundamentals
特色产品: NXP - I2C Interface
标准包装: 1
功能: 温度监控系统(传感器),DIMM DDR 内存
传感器类型: 内部
感应温度: -40°C ~ 125°C
精确度: ±3°C(最小值)
拓扑: ADC(三角积分型),比较器,寄存器库
输出类型: I²C?/SMBus?
输出警报:
输出风扇:
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-WFDFN 裸露焊盘
供应商设备封装: 8-WSON
包装: 标准包装
产品目录页面: 847 (CN2011-ZH PDF)
其它名称: 568-5055-6
SE97B_1
?NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01  27 January 2010
20 of 53
NXP Semiconductors
SE97B
DDR memory module temp sensor with integrated SPD
7.10.3   Read operations
7.10.3.1   Current address read
In Standby mode, the SE97B internal address counter points to the data byte immediately
following the last byte accessed by a previous operation. If the previous byte was the last
byte in memory, then the address counter will point to the first memory byte, and so on. If
the SE97B decodes a slave address with a 1 in the R/W
 bit position (Figure 15
), it will
issue an Acknowledge in the ninth clock cycle and will then transmit the data byte being
pointed at by the address counter. The master can then stop further transmission by
issuing a No Acknowledge on the ninth bit then followed by a STOP condition.
 
7.10.3.2   Selective read
The read operation can also be started at an address different from the one stored in the
address counter. The address counter can be initialized by performing a dummy write
operation (Figure 16
). The START condition is followed by the slave address (with the
R/W
 bit set to 0) and the desired byte address. Instead of following-up with data, the
master then issues a second START, followed by the Current Address Read sequence,
as described in Section 7.10.3.1
.
 
Fig 15.   Current address read timing
0
1
0
A2
A1
A0
1
A
S
1
slave address (memory)
START condition
R/W
acknowledge
from slave
data from memory
SDA
002aab251
P
STOP condition
no acknowledge
from master
A
Fig 16.   Selective read timing
0
1
0
A2
A1
A0
0
A
S
1
A
slave address (memory)
START condition
R/W
acknowledge
from slave
acknowledge
from slave
word address
SDA
002aac901
P
STOP condition
data from memory
A
no acknowledge
from master
0
1
0
A2
A1
A0
S
1
slave address (memory)
START condition
1
A
R/W  acknowledge
from slave
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