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参数资料
| 型号： | SMQ320C32PCMM50 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | 24-BIT, 50 MHz, OTHER DSP, PQFP144 |
| 封装： | PLASTIC, QFP-144 |
| 文件页数： | 2/50页 |
| 文件大小： | 674K |
| 代理商： | SMQ320C32PCMM50 |
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SMQ320C32
DIGITAL SIGNAL PROCESSOR
SGUS027B – APRIL 1998 – REVISED MARCH 1999
10
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
external memory interface (continued)
D For 32-bit-wide physical memory, all STRB0 and STRB1 pins function as byte-enable (chip-select) pins.
See Figure 4.
STRB0_B2/A –2
CS
A14
A13
A2
A1
A0
Data
CS
Data
A14
A13
A2
A1
A0
STRB0_B3/A –1
CS
Data
A2
A13
A14
A0
A1
32-Bit Data Bus
CS
Data
A0
A1
A2
A13
A14
STRB0_B0
STRB0_B1
A0
A1
A2
A13
A14
Data
TMS320C32
.
Memory
8
32
Figure 4. ’C32 With 32-Bit-Wide External Memory
For more detailed information and examples, see
TMS320C32 Addendum to the TMS320C3x User’s Guide
(literature number SPRU132B) and
Interfacing Memory to the SMQ320C32 DSP Application Report (literature
number SPRA040).
D The IOSTRB control signal, like STRB0 and STRB1, is also mapped to a specific range of addresses but
it is a single signal that can access only 32-bit data from 32-bit-wide memory. Its range of addresses appears
in Figure 8, the SMQ320C32’s memory map. The IOSTRB bus timing is different from the STRB0 and
STRB1 bus timings to accommodate slower I/O peripherals.
examples
Figure 5 and Figure 6 show examples of external memory configurations that can be implemented using the
SMQ320C32’s external memory interface. The first example has a 32-bit-wide external memory with 8- and
16-bit data areas and a 32-bit program area.
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