参数资料
型号: SP691ACT-L
厂商: Exar Corporation
文件页数: 11/24页
文件大小: 0K
描述: IC SUPERVISOR MPU LP 16WSOIC
标准包装: 41
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极,推挽式
复位: 高有效/低有效
复位超时: 最小为 140 ms
电压 - 阀值: 4.65V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 管件
其它名称: SP691ACT-L-ND
4) Watchdog function ? Monitors μ P activity
where the watchdog output goes to a logic
LOW state if the watchdog input is not
toggled for greater than the timeout period.
5) Internal switch ? Switches over from V CC
to V BATT if the V CC falls below the reset
threshold.
RESET
Corporation
15
10k ?
TO μ P RESET
RESET and RESET Outputs
The SP691A/693A/800L/800M devices'
RESET and RESET outputs ensure that the μ P
powers up in a known state, and prevents
code-execution errors during power-down or
Figure 18. External Pull-down Resistor Ensures
RESET is Valid with V CC Down to Ground.
brownout conditions.
10k ? and the output saturation voltage is below
The RESET output is active low, and typically
sinks 3.2mA at 0.1V saturation voltage in its
active state. When deasserted, RESET sources
1.6mA at typically V OUT – 0.5V. RESET output
is open drain, active high, and typically sinks
3.2mA with a saturation voltage of 0.1V. When
no backup battery is used, RESET output is
guaranteed to be valid down to V CC = 1V, and
an external 10k ? pull-down resistor on RESET
ensures that RESET will be valid with V CC
down to GND as shown on Figure 18 . As V CC
goes below 1V, the gate drive to the RESET
output switch reduces accordingly, increasing
the R DS (ON) and the saturation voltage. The
10k ? pull-down resistor ensures the parallel
combination of switch plus resistor is around
Vcc
RESET
THRESHOLD
CE IN
CE OUT
12 μ
100 μ s
RESET
RESET
Figure 19. Reset and Chip-Enable Timing
0.4V while sinking 40 μ A. When using a 10k ?
external pull-down resistor, the high state for
the RESET output with Vcc = 4.75V is 4.5V
typical. For battery voltages less than or equal
to 2V connected to V BATT , RESET and RESET
remains valid for V CC from 0V to 5.5V.
RESET and RESET are asserted when V CC falls
below the reset threshold and remain asserted
for the Reset Timeout Period (200ms nominal)
after V CC rises above the reset threshold voltage
on power-up. Refer to Figure 19 . The devices'
battery-switchover comparator does not affect
reset assertion. However, both reset outputs are
asserted in battery-backup mode since V CC must
be below the reset threshold to enter this mode.
100 μ s
Date: 4/18/05
SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over ? Copyright 2005 Sipex Corporation
11
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