参数资料
型号: SP691ACT-L
厂商: Exar Corporation
文件页数: 9/24页
文件大小: 0K
描述: IC SUPERVISOR MPU LP 16WSOIC
标准包装: 41
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极,推挽式
复位: 高有效/低有效
复位超时: 最小为 140 ms
电压 - 阀值: 4.65V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC W
包装: 管件
其它名称: SP691ACT-L-ND
Pin 12 — CE OUT — Chip-Enable Output. This
output pin goes LOW only when CE IN is
LOW and V CC is above the reset threshold
voltage. If CE IN is LOW when RESET is
asserted, this output pin will stay low for
16 μ s or until CE IN goes HIGH, whichever
Pin 15 — RESET — Active LOW Reset Output.
This output pin goes LOW whenever V CC
falls below the reset threshold. This output
pin will remain low typically for 200ms after
V CC crosses the reset threshold voltage on
power-up.
occurs first.
Pin 16 — RESET — Active HIGH Reset
Pin 13 — CE IN — Chip-Enable Input. This is the
input pin to the chip-enable gating circuit.
If this input pin is not used, connect it to
ground or V OUT .
Pin 14 — WDO — Watchdog Output. If WDI
remains HIGH or LOW longer than the
watchdog timeout period, this output pin
goes LOW and RESET is asserted for the
reset timeout period. This output pin returns
HIGH on the next transition at WDI.
This output pin remains HIGH if WDI is
unconnected.
Output. This output pin is open drain and
the inverse of RESET.
PFI
9
10
PFO
WDI
11
Watchdog
Transition
1.25V
14
WDO
OSC SEL
OSC IN
8
7
Detector
Reset /
Watchdog
Timebase
Watchdog
Timer
Reset
Generator
CE OUT
15
16
RESET
RESET
Control
V CC
4.65V or
4.40V*
3
6
2
5
LOWLINE
V OUT
BATT ON
V BATT
CE IN
1
13
* 4.65V for the SP691A/800L
4.40V for the SP693A/800M
4
12
GND
CE OUT
Figure 16. Internal Block Diagram of the SP691A/693A/800L/800M
Date: 4/18/05
SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over ? Copyright 2005 Sipex Corporation
9
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