参数资料
型号: SPC5604PGF0MLL6
厂商: Freescale Semiconductor
文件页数: 10/104页
文件大小: 0K
描述: IC MCU 32BIT 512KB FLASH 100LQFP
标准包装: 90
系列: MPC56xx Qorivva
核心处理器: e200z0h
芯体尺寸: 32-位
速度: 64MHz
连通性: CAN,FlexRay,LIN,SPI,UART/USART
外围设备: DMA,POR,PWM,WDT
输入/输出数: 68
程序存储器容量: 512KB(512K x 8)
程序存储器类型: 闪存
EEPROM 大小: 64K x 8
RAM 容量: 40K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 30x10b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 100-LQFP
包装: 托盘
MPC5604P Microcontroller Data Sheet, Rev. 8
Freescale
13
1.5.17.1
Boot assist module (BAM)
The BAM is a block of read-only one-time programmed memory and is identical for all MPC560xP devices that are based on
the e200z0h core. The BAM program is executed every time the device is powered on if the alternate boot mode has been
selected by the user.
The BAM provides the following features:
Serial bootloading via FlexCAN or LINFlex
Ability to accept a password via the used serial communication channel to grant the legitimate user access to the
non-volatile memory
1.5.18
Error correction status module (ECSM)
The ECSM provides a myriad of miscellaneous control functions regarding program-visible information about the platform
configuration and revision levels, a reset status register, a software watchdog timer, wakeup control for exiting sleep modes,
and information on platform memory errors reported by error-correcting codes and/or generic access error information for
certain processor cores.
The Error Correction Status Module supports a number of miscellaneous control functions for the platform. The ECSM includes
these features:
Registers for capturing information on platform memory errors if error-correcting codes (ECC) are implemented
For test purposes, optional registers to specify the generation of double-bit memory errors are enabled on the
MPC5604P.
The sources of the ECC errors are:
Flash memory
SRAM
1.5.19
Peripheral bridge (PBRIDGE)
The PBRIDGE implements the following features:
Duplicated periphery
Master access privilege level per peripheral (per master: read access enable; write access enable)
Write buffering for peripherals
Checker applied on PBRIDGE output toward periphery
Byte endianess swap capability
1.5.20
Controller area network (FlexCAN)
The MPC5604P MCU contains one controller area network (FlexCAN) module. This module is a communication controller
implementing the CAN protocol according to Bosch Specification version 2.0B. The CAN protocol was designed to be used
primarily as a vehicle serial data bus, meeting the specific requirements of this field: real-time processing, reliable operation in
the EMI environment of a vehicle, cost-effectiveness and required bandwidth. The FlexCAN module contains 32 message
buffers.
The FlexCAN module provides the following features:
Full implementation of the CAN protocol specification, version 2.0B
— Standard data and remote frames
— Extended data and remote frames
— Up to 8-bytes data length
— Programmable bit rate up to 1 Mbit/s
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