参数资料
型号: SPC5604PGF0MLL6
厂商: Freescale Semiconductor
文件页数: 8/104页
文件大小: 0K
描述: IC MCU 32BIT 512KB FLASH 100LQFP
标准包装: 90
系列: MPC56xx Qorivva
核心处理器: e200z0h
芯体尺寸: 32-位
速度: 64MHz
连通性: CAN,FlexRay,LIN,SPI,UART/USART
外围设备: DMA,POR,PWM,WDT
输入/输出数: 68
程序存储器容量: 512KB(512K x 8)
程序存储器类型: 闪存
EEPROM 大小: 64K x 8
RAM 容量: 40K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 30x10b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 100-LQFP
包装: 托盘
MPC5604P Microcontroller Data Sheet, Rev. 8
Freescale
11
Maximum output frequency: 64 MHz
Voltage controlled oscillator (VCO)—frequency 256–512 MHz
Reduced frequency divider (RFD) for reduced frequency operation without forcing the PLL to relock
Frequency-modulated PLL
— Modulation enabled/disabled through software
— Triangle wave modulation
Programmable modulation depth (±0.25% to ±4% deviation from center frequency): programmable modulation
frequency dependent on reference frequency
Self-clocked mode (SCM) operation
1.5.10
Main oscillator
The main oscillator provides these features:
Input frequency range: 4–40 MHz
Crystal input mode or oscillator input mode
PLL reference
1.5.11
Internal RC oscillator
This device has an RC ladder phase-shift oscillator. The architecture uses constant current charging of a capacitor. The voltage
at the capacitor is compared by the stable bandgap reference voltage.
The RC oscillator provides these features:
Nominal frequency 16 MHz
±5% variation over voltage and temperature after process trim
Clock output of the RC oscillator serves as system clock source in case loss of lock or loss of clock is detected by the
PLL
RC oscillator is used as the default system clock during startup
1.5.12
Periodic interrupt timer (PIT)
The PIT module implements these features:
4 general purpose interrupt timers
32-bit counter resolution
Clocked by system clock frequency
Each channel can be used as trigger for a DMA request
1.5.13
System timer module (STM)
The STM module implements these features:
One 32-bit up counter with 8-bit prescaler
Four 32-bit compare channels
Independent interrupt source for each channel
Counter can be stopped in debug mode
1.5.14
Software watchdog timer (SWT)
The SWT has the following features:
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