参数资料
型号: SPC5632MF0MLQA6
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: FLASH, 60 MHz, MICROCONTROLLER, PQFP144
封装: 20 X 20 MM, 0.50 MM PITCH, 1.40 HEIGHT, ROHS COMPLIANT, LQFP-144
文件页数: 33/122页
文件大小: 1173K
代理商: SPC5632MF0MLQA6
MPC5634M Microcontroller Data Sheet, Rev. 6
Overview
Freescale Semiconductor
18
Supports booting from calibration bus interface
Supports censorship protection for internal flash memory
Provides an option to enable the core watchdog timer
Provides an option to disable the system watchdog timer
1.3.12
eMIOS
The eMIOS (Enhanced Modular Input Output System) module provides the functionality to generate or measuretime events.
The channels on this module provide a range of operating modes including the capability to perform dual input capture or dual
output compare as well as PWM output.
The eMIOS provides the following features:
16 channels (24-bit timer resolution)
For compatibility with other family members selected channels and timebases are implemented:
— Channels 0 to 6, 8 to 15, and 23
— Timebases A, B and C
Channels 1, 3, 5 and 6 support modes:
— General Purpose Input/Output (GPIO)
— Single Action Input Capture (SAIC)
— Single Action Output Compare (SAOC)
Channels 2, 4, 11 and 13 support all the modes above plus:
— Output Pulse Width Modulation Buffered (OPWMB)
Channels 0, 8, 9, 10, 12, 14, 15, 23 support all the modes above plus:
— Input Period Measurement (IPM)
— Input Pulse Width Measurement (IPWM)
— Double Action Output Compare (set flag on both matches) (DAOC)
— Modulus Counter Buffered (MCB)
— Output Pulse Width and Frequency Modulation Buffered (OPWFMB)
Three 24-bit wide counter buses
— Counter bus A can be driven by channel 23 or by the eTPU2 and all channels can use it as a reference
— Counter bus B is driven by channel 0 and channels 0 to 6 can use it as a reference
— Counter bus C is driven by channel 8 and channels 8 to 15 can use it as a reference
Shared time bases with the eTPU through the counter buses
Synchronization among internal and external time bases
1.3.13
eTPU2
The eTPU2 is an enhanced co-processor designed for timing control. Operating in parallel with the host CPU, eTPU2 processes
instructions and real-time input events, performs output waveform generation, and accesses shared data without host
intervention. Consequently, for each timer event, the host CPU setup and service times are minimized or eliminated. A powerful
timer subsystem is formed by combining the eTPU2 with its own instruction and data RAM. High-level assembler/compiler
and documentation allows customers to develop their own functions on the eTPU2.
The eTPU2 includes these distinctive features:
32 channels, each channel is associated with one input and one output signal
— Enhanced input digital filters on the input pins for improved noise immunity.
— Identical, orthogonal channels: each channel can perform any time function. Each time function can be assigned
to more than one channel at a given time, so each signal can have any functionality.
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