MC68336/376
REGISTER SUMMARY
MOTOROLA
USER’S MANUAL
Rev. 15 Oct 2000
D-86
The BOFFMSK bit provides a mask for the bus off interrupt.
0 = Bus off interrupt disabled.
1 = Bus off interrupt enabled.
ERRMSK — Error Interrupt Mask
The ERRMSK bit provides a mask for the error interrupt.
0 = Error interrupt disabled.
1 = Error interrupt enabled.
RXMODE[1:0] — Receive Pin Configuration Control
These bits control the configuration of the CANRX0 and CANRX1 pins. Refer to the
TXMODE[1:0] — Transmit Pin Configuration Control
This bit field controls the configuration of the CANTX0 and CANTX1 pins. Refer to the
Table D-60 RX MODE[1:0] Configuration
Pin
RX1
RX0
Receive Pin Configuration
CANRX1
1
NOTES:
1. CANRX1 is not present on the MC68376.
0X
A logic 0 on the CANRX1 pin is interpreted as a dominant bit; a logic 1 on the CANRX1
pin is interpreted as a recessive bit
1X
A logic 1 on the CANRX1 pin is interpreted as a dominant bit; a logic 0 on the CANRX1
pin is interpreted as a recessive bit
CANRX0
X0
A logic 0 on the CANRX0 pin is interpreted as a dominant bit; a logic 1 on the CANRX0
pin is interpreted as a recessive bit
X1
A logic 1 on the CANRX0 pin is interpreted as a dominant bit; a logic 0 on the CANRX0
pin is interpreted as a recessive bit
Table D-61 Transmit Pin Configuration
TXMODE[1:0]
Transmit Pin Configuration
00
Full CMOS1; positive polarity (CANTX0 = 0, CANTX1 = 12 is a dominant level)
NOTES:
1. Full CMOS drive indicates that both dominant and recessive levels are driven by the chip.
2. CANTX1 is not present on the MC68376.
01
Full CMOS; negative polarity3 (CANTX0 = 1, CANTX1 = 0 is a dominant level)
3. If negative polarity is activated when the LOOP bit in CANCTRL1 is set, the RX mode bit
field should also be set to assure proper operation.
1X
Open drain4; positive polarity
4. Open drain drive indicates that only a dominant level is driven by the chip. During a reces-
sive level, the CANTX0 and CANTX1 pins are disabled (three stated), and the electrical lev-
el is achieved by external pull-up/pull-down devices. The assertion of both TX mode bits
causes the polarity inversion to be cancelled (open drain mode forces the polarity to be
positive).