MC68336/376
SYSTEM INTEGRATION MODULE
MOTOROLA
USER’S MANUAL
Rev. 15 Oct 2000
5-17
the modulus counter value reaches zero, an interrupt is generated. The modulus
counter is then reloaded with the value in PITM[7:0] and counting repeats. If a new
value is written to PITR, it is loaded into the modulus counter when the current count
is completed.
When a fast reference frequency is used, the PIT period can be calculated as follows:
When an externally input clock frequency is used, the PIT period can be calculated as
follows:
5.4.7 Interrupt Priority and Vectoring
Interrupt priority and vectoring are determined by the values of the periodic interrupt
request level (PIRQL[2:0]) and periodic interrupt vector (PIV) fields in the periodic
interrupt control register (PICR).
The PIRQL field is compared to the CPU32 interrupt priority mask to determine
whether the interrupt is recognized. Table 5-8 shows PIRQL[2:0] priority values.
Because of SIM hardware prioritization, a PIT interrupt is serviced before an external
interrupt request of the same priority. The periodic timer continues to run when the
interrupt is disabled.
The PIV field contains the periodic interrupt vector. The vector is placed on the IMB
when an interrupt request is made. The vector number is used to calculate the address
of the appropriate exception vector in the exception vector table. The reset value of the
PIV field is $0F, which corresponds to the uninitialized interrupt exception vector.
Table 5-8 Periodic Interrupt Priority
PIRQL[2:0]
Priority Level
000
Periodic interrupt disabled
001
Interrupt priority level 1
010
Interrupt priority level 2
011
Interrupt priority level 3
100
Interrupt priority level 4
101
Interrupt priority level 5
110
Interrupt priority level 6
111
Interrupt priority level 7
PIT Period
128
() PITM[7:0]
() 1 if PTP = 0, 512 if PTP = 1
() 4
()
f
ref
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=
PIT Period
PITM[7:0]
() 1 if PTP = 0, 512 if PTP = 1
() 4
()
f
ref
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=