- 您现在的位置：买卖IC网 > PDF目录4254 > SST25VF010A-33-4I-ZAE (Microchip Technology)IC FLASH SER 1MB 33MHZ SPI 8CSP PDF资料下载
参数资料
| 型号： | SST25VF010A-33-4I-ZAE |
| 厂商： | Microchip Technology |
| 文件页数： | 17/28页 |
| 文件大小： | 0K |
| 描述： | IC FLASH SER 1MB 33MHZ SPI 8CSP |
| 标准包装： | 3,000 |
| 系列： | SST25 |
| 格式 - 存储器： | 闪存 |
| 存储器类型： | FLASH |
| 存储容量： | 1M (128K x 8) |
| 速度： | 33MHz |
| 接口： | SPI 串行 |
| 电源电压： | 2.7 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-UFBGA，CSPBGA |
| 供应商设备封装： | 8-CSP |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页当前第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页
1 Mbit SPI Serial Flash
A Microchip Technology Company
SST25VF010A
Data Sheet
Write-Status-Register (WRSR)
The Write-Status-Register instruction works in conjunction with the Enable-Write-Status-Register
(EWSR) instruction to write new values to the BP1, BP0, and BPL bits of the status register. The Write-
Status-Register instruction must be executed immediately after the execution of the Enable-Write-Sta-
tus-Register instruction (very next instruction bus cycle). This two-step instruction sequence of the
EWSR instruction followed by the WRSR instruction works like SDP (software data protection) com-
mand structure which prevents any accidental alteration of the status register values. The Write-Sta-
tus-Register instruction will be ignored when WP# is low and BPL bit is set to “1”. When the WP# is
low, the BPL bit can only be set from “0” to “1” to lock-down the status register, but cannot be reset
from “1” to “0”. When WP# is high, the lock-down function of the BPL bit is disabled and the BPL, BP0,
and BP1 bits in the status register can all be changed. As long as BPL bit is set to 0 or WP# pin is
driven high (V IH ) prior to the low-to-high transition of the CE# pin at the end of the WRSR instruction,
the BP0, BP1, and BPL bit in the status register can all be altered by the WRSR instruction. In this
case, a single WRSR instruction can set the BPL bit to “1” to lock down the status register as well as
altering the BP0 and BP1 bit at the same time. See Table 3 for a summary description of WP# and BPL
functions. CE# must be driven low before the command sequence of the WRSR instruction is entered
and driven high before the WRSR instruction is executed. See Figure 14 for EWSR and WRSR instruc-
tion sequences.
CE#
SCK
MODE 3
MODE 0
0 1 2 3 4 5 6 7
MODE 3
MODE 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
STATUS
REGISTER IN
SI
SO
MSB
50
01
MSB
HIGH IMPEDANCE
7 6 5 4 3 2 1 0
MSB
1265 F14.0
Figure 14: Enable-Write-Status-Register (EWSR) and Write-Status-Register (WRSR)
Sequence
?2011 Silicon Storage Technology, Inc.
17
S725081A
10/11
相关PDF资料 |
PDF描述 |
|---|---|
| 2-829261-2 | CONN D-SUB HD FEMALE SCREW LOCK |
| RCB110DHAN | CONN EDGECARD 220PS R/A .050 DIP |
| 24LC128T-E/MS | IC EEPROM 128KBIT 400KHZ 8MSOP |
| 24LC128-E/MS | IC EEPROM 128KBIT 400KHZ 8MSOP |
| 25LC640AT-E/MNY | IC EEPROM 64KBIT 10MHZ 8TDFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SST25VF016B | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:16 Mbit SPI Serial Flash |
| SST25VF016B_10 | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:16 Mbit SPI Serial Flash |
| SST25VF016B_11 | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:16 Mbit SPI Serial Flash |
| SST25VF016B_13 | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:16 Mbit SPI Serial Flash |
| SST25VF016B-25-4C-UA | 制造商:Microchip Technology Inc 功能描述:2.7V TO 3.6V 16MBIT SPI SERIAL FLASH - Gel-pak, waffle pack, wafer, diced wafer on film |
发布紧急采购，3分钟左右您将得到回复。