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参数资料
| 型号： | SST25WF512-40-5I-SAF |
| 厂商： | Microchip Technology |
| 文件页数： | 15/36页 |
| 文件大小： | 0K |
| 描述： | IC FLASH SER 512K 40MH SPI 8SOIC |
| 标准包装： | 100 |
| 系列： | SST25 |
| 格式 - 存储器： | 闪存 |
| 存储器类型： | FLASH |
| 存储容量： | 512K (64K x 8) |
| 速度： | 40MHz |
| 接口： | SPI 串行 |
| 电源电压： | 1.65 V ~ 1.95 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
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512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit 1.8V SPI Serial Flash
A Microchip Technology Company
SST25WF512 / SST25WF010 / SST25WF020 / SST25WF040
Data Sheet
Byte-Program
The Byte-Program instruction programs the bits in the selected byte to the desired data. The selected
byte must be in the erased state (FFH) when initiating a Program operation. A Byte-Program instruction
applied to a protected memory area will be ignored.
Prior to any Write operation, the Write-Enable (WREN) instruction must be executed. CE# must remain
active low for the duration of the Byte-Program instruction. The Byte-Program instruction is initiated by
executing an 8-bit command, 02H, followed by address bits [A 23 -A 0 ]. Following the address, the data is
input in order from MSB (bit 7) to LSB (bit 0). CE# must be driven high before the instruction is exe-
cuted. The user may poll the Busy bit in the software status register or wait T BP for the completion of
the internal self-timed Byte-Program operation. See Figure 8 for the Byte-Program sequence.
CE#
MODE 3
0 1 2 3 4 5
6 7 8
15 16
23 24
31 32
39
SCK
MODE 0
SI
02
ADD.
ADD.
ADD.
D IN
SO
MSB
HIGH IMPEDANCE
MSB LSB
1328 F08.0
Figure 8: Byte-Program Sequence
Auto Address Increment (AAI) Word-Program
The AAI program instruction allows multiple bytes of data to be programmed without re-issuing the
next sequential address location. This feature decreases total programming time when multiple bytes
or the entire memory array is to be programmed. An AAI Word program instruction pointing to a pro-
tected memory area will be ignored. The selected address range must be in the erased state (FFH)
when initiating an AAI Word Program operation. While within AAI Word Programming sequence, the
only valid instructions are AAI Word (ADH), RDSR (05H), or WRDI (04H). Users have three options to
determine the completion of each AAI Word program cycle: hardware detection by reading the Serial
Output, software detection by polling the BUSY bit in the software status register or wait T BP. Refer to
End-Of-Write Detection section for details.
Prior to any write operation, the Write-Enable (WREN) instruction must be executed. The AAI Word
Program instruction is initiated by executing an 8-bit command, ADH, followed by address bits [A 23 -A 0 ].
Following the addresses, two bytes of data are input sequentially, each one from MSB (Bit 7) to LSB
(Bit 0). The first byte of data (D0) will be programmed into the initial address [A 23 -A 1 ] with A 0 = 0, the
second byte of Data (D1) will be programmed into the initial address [A 23 -A 1 ] with A 0 = 1. CE# must be
driven high before the AAI Word Program instruction is executed. The user must check the BUSY sta-
tus before entering the next valid command. Once the device indicates it is no longer busy, data for the
next two sequential addresses may be programmed and so on. When the last desired byte had been
entered, check the busy status using the hardware method or the RDSR instruction and execute the
Write-Disable (WRDI) instruction, 04H, to terminate AAI. Check the busy status after WRDI to deter-
mine if the device is ready for any command. See Figures 11 and 12 for AAI Word programming
sequence.
?2011 Silicon Storage Technology, Inc.
15
DS25016A
06/11
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