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参数资料
| 型号： | SST55LD017C-40-I-TQW |
| 厂商： | SILICON STORAGE TECHNOLOGY INC |
| 元件分类： | 存储控制器/管理单元 |
| 英文描述： | FLASH MEMORY DRIVE CONTROLLER, PQFP100 |
| 封装： | MS-026AED, TQFP-100 |
| 文件页数： | 2/52页 |
| 文件大小： | 606K |
| 代理商： | SST55LD017C-40-I-TQW |
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10
EOL Product Data Sheet
ATA Flash Disk Controller
SST55LD017A / SST55LD017B / SST55LD017C
2006 Silicon Storage Technology, Inc.
S71211-03-EOL
4/06
3.1 Pin Description
TABLE
3-2: HOST SIDE INTERFACE
Symbol
Type1
1. Please refer to Section 11.1 for detail
Pin
Name and Functions
A2 - A0
I
83,84,85
A[2:0] are used to select one of eight registers in the Task File.
D15 - D0
I/O
92,59,57,
54,52,100,
98,95,93,
58,56,53,
51,99,97,
94
Data bus
CS1FX#,
CS3FX#
I
66,67
CS1FX# is the chip select for the task file registers while CS3FX# is used to select the
Alternate Status register and the Device Control register.
CSEL
I
61
This internally pulled-up signal is used to configure this device as a Master or a Slave.
When this pin is grounded, this device is configured as a Master. When the pin is open,
this device is configured as a Slave. The pin setting should remain the same from
power-up to power-down.
IORD#
I
70
This is an I/O Read strobe generated by the host. This signal gates I/O data onto the bus
from the chip.
IOWR#
I
73
The I/O Write strobe pulse is used to clock I/O data into the chip.
IOCS16#
O
90
This output signal is asserted low when the device is indicating a word data transfer
cycle.
INTRQ
O
65
This signal is the active high Interrupt Request to the host.
PDIAG#
I/O
89
The Pass Diagnostic signal in the Master/Slave handshake protocol.
DASP#
I/O
63
The Drive Active/Slave Present signal in the Master/Slave handshake protocol.
RESET#
I
81
This input pin is the active low hardware reset from the host.
WP_PD#
I
62
The WP_PD# pin can be used for either the Write-Protect mode or Power-Down mode,
but only one mode is active at any time. The Write-Protect or Power-Down modes can
be selected through the host command. The Write-Protect mode is the factory default
T3-2.11 1211
TABLE
3-3: FLASH MEDIA INTERFACE
Symbol
Type
Pin
Name and Functions
FWP#
O
25
This signal is an Active Low Flash Media Chip Write-Protect.
Connect this pin to NAND Flash Media Write-Protect Pin.
FRDYbsy#
I
27
This signal is Flash Media Chip Ready/Busy#.
Signal High is Flash Media Ready signal. Low is Busy.
FRE#
O
28
This signal is an Active Low Flash Media Chip Read.
FWE#
O
29
This signal is an Active Low Flash Media Chip Write.
FCLE
O
30
This signal is an Active High Flash Media Chip Command Latch Enable.
FALE
O
31
This signal is an Active High Flash Media Chip Address Latch Enable.
FAD7-FAD0
I/O
43,42,41,
40,39,34,
33,32
These are Flash Media Chip Address/Data Bus pins.
FCE4#-FCE0#
O
49,48,47,
46,45
These are Active Low Flash Media Chip Enable pins.
T3-3.7 1211
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SST55LD017D-40-C-TQW | 功能描述:闪存 MEDIA CONTLR RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| SST55LD017D-40-C-TQWE | 功能描述:闪存 MEDIA CONTLR RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| SST55LD019 | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:ATA Flash Disk Controller |
| SST55LD019A | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:ATA Flash Disk Controller |
| SST55LD019A-45-C-BWE | 功能描述:总线收发器 ATA Media 45MHz 3.3V Commercial RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
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