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参数资料
| 型号： | ST10R172LT6 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, 50 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, TQFP-100 |
| 文件页数： | 66/68页 |
| 文件大小： | 657K |
| 代理商： | ST10R172LT6 |
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ST10R172L - PIN DESCRIPTION
P4.0–
P4.7
23-26
29-32-
I/O
5T
An 8-bit bidirectional I/O port. Port 8 is bit-wise programmable
for input or output via direction bits. For a pin configured as
input, the output driver is put into high-impedance state.
Port 4 can be used to output the segment address lines for
external bus configuration.
23
O
5T
P4.0
A16
Least Significant Segment Addr. Line
...
26
O
5T
P4.3
A19
Segment Address Line
29
O
5T
P4.4
A20
Segment Address Line
O
5T
SSPCE1
Chip Enable Line 1
30
O
5T
P4.5
A21
Segment Address Line
O
5T
SSPCE0
SSPChip Enable Line 0
31
O
5T
P4.6
A22
Segment Address Line
I/O
5T
SSPDAT
SSP Data Input/Output Line
32
O
5T
P4.7
A23
Most Significant Segment Addr. Line
O
5T
SSPCLK
SSP Clock Output Line
RD
33
O
5T
External Memory Read Strobe. RD is activated for every exter-
nal instruction or data read access.
WR/
WRL
34
O
5T
External Memory Write Strobe. In WR-mode, this pin is acti-
vated for every external data write access. In WRL-mode, this
pin is activated for low byte data write accesses on a 16-bit
bus, and for every data write access on an 8-bit bus.
See WRCFG in the SYSCON register for mode selection.
READY/
READY
35
I
5T
Ready Input. Active level is programmable. When the Ready
function is enabled, the selected inactive level at this pin dur-
ing an external memory access will force the insertion of mem-
ory cycle time waitstates until the pin returns to the selected
active level. Polarity is programmable.
Sy
mb
o
l
Pi
n
N
u
mb
e
r
(T
Q
F
P
)
In
p
u
t(I
)
Ou
tp
ut
(
O
)
Ki
n
d
1)
Fu
nc
ti
on
Table 1 Pin definitions
1
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