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参数资料
| 型号： | ST52T301P |
| 厂商： | 意法半导体 |
| 英文描述： | 8-Bit OTP/EPROM DuaLogic] MCUs WITH ADC, UART, TIMER, TRIAC & PWM DRIVER |
| 中文描述： | 8位检察官办公室/存储器DuaLogic]与艺术发展局和UART，定时器，可控硅控制器 |
| 文件页数： | 30/100页 |
| 文件大小： | 497K |
| 代理商： | ST52T301P |
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7.TIMER
ST52x301 offers one on-chip Timer peripheral.
TheTimerconsists of an 8-bitcounterwitha 16-bit
programmable prescaler, thus giving a maximum
count of 2
24
, and control logic that allows
configuring the functionment and the type of
peripheral outputs. Figure 7.2 shows the Timer
block diagram and Figure 7.3 shows the internal
structureof the Timer.
Thecontentofthe8-bitcountercanberead/written
andis incrementedon theRisingEdgeof the16-bit
prescaleroutput(PRESCOUT).Moreover,itcanbe
read under program control at any instant of the
counting phase and loaded in a location of the
RegisterFile.Theprescalercanbe givenanyvalue
between 0 and FFFFh setting the 4-th (TMLSB)
and 5-th (TMMSB) locations of the Configuration
RegistersBench.
7.1TimerFunctionment
The Timer requiresthree signals:TMRCLK,TRST
andTSTART(seeFigure7.3).Eachof themcanbe
generatedinternallyor externally,this possibility is
programmableby the user.
TMRCLK increments the counted value of the
Prescaler. It can be, by setting CKSL of
REG_CONF6 register, the internal clock signal
(CLKM) or the signal providedon the pinTCLK.
TRSTresetstozerothecontentofthe8bitcounter.
It is generated by the TRES or RESET external
signalsoritisforcedbyTMRSTbitofREG_CONF6
register.
TSTARTstarts/stopsthePrescalercounting.It can
be given on the pinTCTRL or it is forcedby TMST
bit of REG_CONF6register.
The TSTART signal allows to work in two different
modes:
LEVEL (Time Counter)
: If the TSTART signal is
highthe Timerstartsthecount.Whenthe TSTART
islow the countis stoppedand thecurrent valueis
stored in the TMR_OUT register of the Input
registerBench, thenit canbetransferredto the j-th
location of the Registers File by using the
instruction:
LDRI reg-j 4
EDGE(PeriodCounter)
: Afterthe reset, when the
firstedge of theTSTARTsignalappears,theTimer
starts the count, at the next TSTART the Timer is
stopped.In this way it is possible to measure the
periodof an external signal.
The functionment modality is set by the TMEL
configurationbit of REG_CONF6register.
The starting value of the Counter can be either a
value contained in the Register File or directly a
Fuzzy Output.If INPSL (REG_CONF7(3))is setto
”1”thenthe valuecomesfrom one of thelocations
of the Register File (
LDRP 0, reg-i);
on the
contrary it is generated by the Fuzzy Core. The
choice between the two possible fuzzy outputs is
set by the FZSL configurationbit of REG_CONF6
register
FZSL=0/1 means the starting value is the loaded
from the FUZZY_OUT_0/1.
Level
Edge
start
stop
start
start
stop
start
0
0
0
3
3
3
2
1
Reset
Clock
Counted
Value
Figure7.1.TimerFunctionalities
30/99
ST52T301/E301
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