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参数资料
| 型号： | ST52T301P |
| 厂商： | 意法半导体 |
| 英文描述： | 8-Bit OTP/EPROM DuaLogic] MCUs WITH ADC, UART, TIMER, TRIAC & PWM DRIVER |
| 中文描述： | 8位检察官办公室/存储器DuaLogic]与艺术发展局和UART，定时器，可控硅控制器 |
| 文件页数： | 41/100页 |
| 文件大小： | 497K |
| 代理商： | ST52T301P |
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9 SERIAL COMMUNICATION INTERFACE
The Serial Communication Interface (SCI)
integrated into the fuzzy processor ST52x301
provides a general purpose shift register
peripheral, that allows to link several widely
distributed MCUs, through their SCI subsystem.
The SCI gives a serial interface providing
communication with common baud rates, up to
38400Hz, and flexible character format.
The SCI is a full-duplex UART-type asynchronous
system with standard Non Return to Zero (NRZ)
format for the transmitted/receivedbit. The length
of the transmittedword is 10/11 bits(1 start bit,8/9
databits, 1 stopbit).
The SCI is composed of three modules:Receiver,
Transmitter and Baud-Rate Generator and it is
configuredby means of ConfigurationRegisters 3
and 1.
9.1 SCI RECEIVERBLOCK
The
SCI Receiver block manages the
synchronization of the serial data stream and
stores the data characters. The SCI Receiver is
mainly formed by two sub-systems: Recovery
BufferBlock and SCDR_RX Block.
The RE configuration bit set to ”1” (Configuration
Register3) enablesthe SCI Receiver.
The SCI receives data coming from the RxD pin
and drives the Recovery Buffer Block, that is a
high-speed shift register operating at a clock
frequency(CLOCK_RX) 16 times higher than the
fixed baud rate (CLOCK_TX).This sampling rate,
higher than the Baud Rate clock, allows to detect
Figure9.2.SCI Block Diagram
Figure 9.1.SCI transmitted word structures
41/99
ST52T301/E301
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