参数资料
型号: ST62P35BQ6/XXX
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP52
封装: PLASTIC, QFP-52
文件页数: 16/82页
文件大小: 617K
代理商: ST62P35BQ6/XXX
23/82
ST62T35B/E35B
RESETS (Cont’d)
3.2.3 Watchdog Reset
The MCU provides a Watchdog timer function in
order to ensure graceful recovery from software
upsets. If the Watchdog register is not refreshed
before an end-of-count condition is reached, the
internal reset will be activated. This, amongst oth-
er things, resets the watchdog counter.
The MCU restarts just as though the Reset had
been generated by the RESET pin, including the
built-in stabilisation delay period.
3.2.4 Application Notes
No external resistor is required between VDD and
the Reset pin, thanks to the built-in pull-up device.
The POR circuit operates dynamically, in that it
triggers MCU initialization on detecting the rising
edge of VDD. The typical threshold is in the region
of 2 volts, but the actual value of the detected
threshold depends on the way in which VDD rises.
The POR circuit is
NOT designed to supervise
static, or slowly rising or falling VDD.
3.2.5 MCU Initialization Sequence
When a reset occurs the stack is reset, the PC is
loaded with the address of the Reset Vector (lo-
cated in program ROM starting at address
0FFEh). A jump to the beginning of the user pro-
gram must be coded at this address. Following a
Reset, the Interrupt flag is automatically set, so
that the CPU is in Non Maskable Interrupt mode;
this prevents the initialisation routine from being
interrupted. The initialisation routine should there-
fore be terminated by a RETI instruction, in order
to revert to normal mode and enable interrupts. If
no pending interrupt is present at the end of the in-
itialisation routine, the MCU will continue by
processing the instruction immediately following
the RETI instruction. If, however, a pending inter-
rupt is present, it will be serviced.
Figure 14. Reset and Interrupt Processing
Figure 15. Reset Block Diagram
RESET
VECTOR
JP
JP:2 BYTES/4 CYCLES
RETI
RETI: 1 BYTE/2 CYCLES
INITIALIZAT ION
ROUTINE
VA00181
VDD
RESET
300k
2.8k
POWER
WATC HDOG RESET
CK
COUNTE R
RESET
ST6
INTERNAL
RESET
fOSC
RESET
ON RESET
VA0200B
22
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