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参数资料
| 型号： | ST62P35BQ6/XXX |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP52 |
| 封装： | PLASTIC, QFP-52 |
| 文件页数： | 67/82页 |
| 文件大小： | 617K |
| 代理商： | ST62P35BQ6/XXX |
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ST62T35B/E35B
1.2 PIN DESCRIPTIONS
VDD and VSS. Power is supplied to the MCU via
these two pins. VDD is the power connection and
VSS is the ground connection.
VDDp and VSSp. Power is supplied to the MCU
I/Os independently from the rest of the chip using
these two pins. These pins have to be connected
to the VDD and VSS pins. It is not allowed to leave
any of these pins unconnected or to apply different
potentials
respectively
to
VDD/VDDp
and
VSS/VSSp.
AVDD and AVSS. Power is supplied to the
MCUA/D converter independently from the rest of
the chip using these two pins.
OSCin and OSCout. These pins are internally
connected to the on-chip oscillator circuit. A quartz
crystal, a ceramic resonator or an external clock
signal can be connected between these two pins.
The OSCin pin is the input pin, the OSCout pin is
the output pin.
RESET. The active-low RESET pin is used to re-
start the microcontroller.
TEST/V
PP. The TEST must be held at VSS for nor-
mal operation. If TEST pin is connected to a
+12.5V
level
during
the
reset
phase,
the
EPROM/OTP programming Mode is entered.
NMI. The NMI pin provides the capability for asyn-
chronous interruption, by applying an external non
maskable interrupt to the MCU. The NMI input is
falling edge sensitive with Schmitt trigger charac-
teristics. The user can select as option the availa-
bility of an on-chip pull-up at this pin.
PA0-PA7. These 8 lines are organised as one I/O
port (A). Each line may be configured under soft-
ware control as inputs with or without internal pull-
up resistors, interrupt generating inputs with pull-
up resistors, open-drain or push-pull outputs.
PA2/OVF, PA3/PWM, PA4/CP1 and PA5/CP2
can be used respectively as overflow output pin,
output compare pin, and as two input capture pins
for the embedded 16-bit Auto-Reload Timer.
In addition, PA4-PA5 can also be used as analog
inputs for the A/D converter while PA0-PA3 can
sink 20mA for direct LED or TRIAC drive.
PB0...PB7 These 8 lines are organised as one I/O
port (B). Each line may be configured under soft-
ware control as inputs with or without internal pull-
up resistors, interrupt generating inputs with pull-
up resistors, open-drain or push-pull outputs, an-
alog inputs for the A/D converter.
PC4-PC7. These 4 lines are organised as one I/O
port (C). Each line may be configured under soft-
ware control as input with or without internal pull-
up resistor, interrupt generating input with pull-up
resistor, analog input for the A/D converter, open-
drain or push-pull output.
PD0...PD7. These 8 lines are organised as one
I/O port (portD). Each line may be configured
under software control as input with or without in-
ternal pull-up resistor, interrupt generating input
with pull-up resistor, analog input open-drain or
push-pull output. In adition, the pins PD5/TXD1
and PD4/RXD1 can be used as UART output
(PD5/TXD1) or UART input (PD4/RXD1). The pins
PD3/Sout, PD2/Sin and PD1/SCL can also be
used respectively as data out, data in and Clock
pins for the on-chip SPI.
PE0...PE7. These 8 lines are organised as one I/O
port (PE). Each line may be configured under soft-
ware control as input with or without internal pull-
up resistor, interrupt generation input with pull-up
resistor, open-drain or push-pull output. In output
mode, these lines can also sink 20mA for direct
LED and TRIAC driving.
TIMER. This is the TIMER 1 I/O pin. In input
mode, it is connected to the prescaler and acts as
external timer clock or as control gate for the in-
ternal timer clock. In output mode, the TIMER pin
outputs the data bit when a time-out occurs.The
user can select as option the availability of an on-
chip pull-up at this pin.
6
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