参数资料
型号: ST72652C4T1/XXX
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, MICROCONTROLLER, PQFP48
封装: 7 X 7 MM, ROHS COMPLIANT, TQFP-48
文件页数: 157/161页
文件大小: 2656K
代理商: ST72652C4T1/XXX
ST72651AR6
95/161
Doc ID 7215 Rev 4
SERIAL PERIPHERAL INTERFACE (Cont’d)
11.6.3.1 Functional Description
A basic example of interconnections between a
single master and a single slave is illustrated in
The MOSI pins are connected together and the
MISO pins are connected together. In this way
data is transferred serially between master and
slave (most significant bit first).
The communication is always initiated by the mas-
ter. When the master device transmits data to a
slave device via MOSI pin, the slave device re-
sponds by sending data to the master device via
the MISO pin. This implies full duplex communica-
tion with both data out and data in synchronized
with the same clock signal (which is provided by
the master device via the SCK pin).
To use a single data line, the MISO and MOSI pins
must be connected at each node (in this case only
simplex communication is possible).
Four possible data/clock timing relationships may
be chosen (see Figure 59) but master and slave
must be programmed with the same timing mode.
Figure 56. Single Master/ Single Slave Application
8-BIT SHIFT REGISTER
SPI
CLOCK
GENERATOR
8-BIT SHIFT REGISTER
MISO
MOSI
MISO
SCK
SLAVE
MASTER
SS
VDDF
MSBit
LSBit
MSBit
LSBit
Not used if SS is managed
by software
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