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参数资料
型号： ST7FLITE19BF0B6
厂商： STMICROELECTRONICS
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP20
封装： 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-20
文件页数： 76/159页
文件大小： 2855K
代理商： ST7FLITE19BF0B6
ST7LITE1xB
23/159
7 SUPPLY, RESET AND CLOCK MANAGEMENT
The device includes a range of utility features for
securing the application in critical situations (for
example in case of a power brown-out), and re-
ducing the number of external components.
Main features
■ Clock Management
– 1 MHz internal RC oscillator (enabled by op-
tion byte, available on ST7LITE15B and
ST7LITE19B devices only)
– 1 to 16 MHz External crystal/ceramic resona-
tor (selected by option byte)
– External Clock Input (enabled by option byte)
– PLL for multiplying the frequency by 8 or 4
(enabled by option byte)
– For clock ART counter only: PLL32 for multi-
plying the 8 MHz frequency by 4 (enabled by
option byte). The 8 MHz input frequency is
mandatory and can be obtained in the follow-
ing ways:
–1 MHz RC + PLLx8
–16 MHz external clock (internally divided
by 2)
–2 MHz. external clock (internally divided by
2) + PLLx8
–Crystal oscillator with 16 MHz output fre-
quency (internally divided by 2)
■ Reset Sequence Manager (RSM)
■ System Integrity Management (SI)
– Main supply Low voltage detection (LVD) with
reset generation (enabled by option byte)
– Auxiliary Voltage detector (AVD) with interrupt
capability for monitoring the main supply (en-
abled by option byte)
7.1 INTERNAL RC OSCILLATOR ADJUSTMENT
The device contains an internal RC oscillator with
an accuracy of 1% for a given device, temperature
and voltage range (4.5V-5.5V). It must be calibrat-
ed to obtain the frequency required in the applica-
tion. This is done by software writing a 10-bit cali-
bration value in the RCCR (RC Control Register)
and in the bits 6:5 in the SICSR (SI Control Status
Register).
Whenever the microcontroller is reset, the RCCR
returns to its default value (FFh), i.e. each time the
device is reset, the calibration value must be load-
ed in the RCCR. Predefined calibration values are
stored in EEPROM for 3 and 5V VDD supply volt-
ages at 25°C, as shown in the following table.
1. DEE0h, DEE1h, DEE2h and DEE3h addresses
are located in a reserved area of non-volatile
memory. They are read-only bytes for the applica-
tion code. This area cannot be erased or pro-
grammed by any ICC operation.
For compatibility reasons with the SICSR register,
CR[1:0] bits are stored in the 5th and 6th position
of DEE1 and DEE3 addresses.
Notes:
– In 38-pulse ICC mode, the internal RC oscillator
is forced as a clock source, regardless of the se-
lection in the option byte. For ST7LITE10B devic-
es which do not support the internal RC
oscillator, the “option byte disabled” mode must
be used (35-pulse ICC mode entry, clock provid-
ed by the tool).
– See “ELECTRICAL CHARACTERISTICS” on
page 110. for more information on the frequency
and accuracy of the RC oscillator.
– To improve clock stability and frequency accura-
cy, it is recommended to place a decoupling ca-
pacitor, typically 100nF, between the VDD and
VSS pins as close as possible to the ST7 device.
– These bytes are systematically programmed by
ST, including on FASTROM devices.
Caution: If the voltage or temperature conditions
change in the application, the frequency may need
to be recalibrated.
Refer to application note AN1324 for information
on how to calibrate the RC frequency using an ex-
ternal reference signal.
7.2 PHASE LOCKED LOOP
The PLL can be used to multiply a 1MHz frequen-
cy from the RC oscillator or the external clock by 4
or 8 to obtain fOSC of 4 or 8 MHz. The PLL is ena-
bled and the multiplication factor of 4 or 8 is select-
ed by 2 option bits.
– The x4 PLL is intended for operation with VDD in
the 2.7V to 3.3V range
RCCR
Conditions
ST7LITE1xB
Address
RCCRH0 VDD=5V
TA=25°C
fRC=1MHz
DEE0h 1) (CR[9:2])
RCCRL0
DEE1h 1) (CR[1:0])
RCCRH1 VDD=3.3V
TA=25°C
fRC=1MHz
DEE2h 1) (CR[9:2])
RCCRL1
DEE3h 1) (CR[1:0])
1
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相关代理商/技术参数
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