参数资料
型号: ST7PL35F2UA/XXXE
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, QCC20
封装: 5 X 6 MM, ROHS COMPLIANT, QFN-20
文件页数: 14/168页
文件大小: 2955K
代理商: ST7PL35F2UA/XXXE
Obsolete
Product(s)
- Obsolete
Product(s)
ST7L34, ST7L35, ST7L38, ST7L39
110/168
LINSCI
SERIAL COMMUNICATION INTERFACE (LIN Mode) (cont’d)
11.5.9.9 Error due to LIN Synch measurement
The LIN Synch Field is measured over eight bit
times.
This measurement is performed using a counter
clocked by the CPU clock. The edge detections
are performed using the CPU clock cycle.
This leads to a precision of 2 CPU clock cycles for
the measurement which lasts 16*8*LDIV clock cy-
cles.
Consequently, this error (DMEAS) is equal to:
2 / (128*LDIVMIN).
LDIVMIN corresponds to the minimum LIN prescal-
er content, leading to the maximum baud rate, tak-
ing into account the maximum deviation of +/-15%.
11.5.9.10 Error due to Baud Rate Quantization
The baud rate can be adjusted in steps of 1 / (16 *
LDIV). The worst case occurs when the “real”
baud rate is in the middle of the step.
This leads to a quantization error (DQUANT) equal
to 1 / (2*16*LDIVMIN).
11.5.9.11
Impact
of
Clock
Deviation
on
Maximum Baud Rate
The choice of the nominal baud rate (LDIVNOM)
will influence both the quantization error (DQUANT)
and the measurement error (DMEAS). The worst
case occurs for LDIVMIN.
Consequently, at a given CPU frequency, the
maximum possible nominal baud rate (LPRMIN)
should be chosen with respect to the maximum tol-
erated deviation given by the equation:
DTRA + 2 / (128*LDIVMIN) + 1 / (2*16*LDIVMIN)
+ DREC + DTCL < 3.75%
Example:
A nominal baud rate of 20Kbits/s at TCPU = 125ns
(8 MHz) leads to LDIVNOM = 25d.
LDIVMIN = 25 - 0.15*25 = 21.25
DMEAS = 2 / (128*LDIVMIN) * 100 = 0.00073%
DQUANT = 1 / (2*16*LDIVMIN) * 100 = 0.0015%
LIN Slave systems
For LIN Slave systems (the LINE and LSLV bits
are set), receivers wake up by LIN Synch Break or
LIN Identifier detection (depending on the LHDM
bit).
Hot Plugging Feature for LIN Slave Nodes
In LIN Slave Mute Mode (the LINE, LSLV and
RWU bits are set) it is possible to hot plug to a net-
work during an ongoing communication flow. In
this case the SCI monitors the bus on the RDI line
until 11 consecutive dominant bits have been de-
tected and discards all the other bits received.
相关PDF资料
PDF描述
ST7L35F2UA/XXXRE 8-BIT, MROM, 8 MHz, MICROCONTROLLER, QCC20
ST7L35F2UC/XXXRE 8-BIT, MROM, 8 MHz, MICROCONTROLLER, QCC20
ST7L39F2MC/XXXE 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO20
ST7L39F2UC/XXXRE 8-BIT, MROM, 8 MHz, MICROCONTROLLER, QCC20
ST7PL34F2MC/XXXE 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO20
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