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GENERAL DESCRIPTION
PIN DESCRIPTION (Cont’d)
1.2.1 I/O Port Configuration
All ports can be individually configured as input, bi-
directional, output, or alternate function. Refer to
the Port Bit Configuration Table in the I/O Port
Chapter.
No I/O pins have any physical weak pull-up capa-
bility (they will show no pull-up if they are pro-
grammed in the "weak pull-up" software mode).
Input levels can be selected on a bit basis by
choosing between TTL or CMOS input levels for I/
O port pin except for P2.(5:4,0), P3.(6:3,1:0),
P4.(1:0) which are implemented with a Schmitt
trigger function.
All port output configurations can be software se-
lected on a bit basis to provide push-pull or open
drain driving capabilities. For all ports, when con-
figured as open-drain, the voltage on the pin must
never exceed the VDD power line value (refer to
Electrical characteristics section).
1.2.2 I/O Port Reset State
I/Os are reset asynchronously as soon as the RE-
SET pin is asserted low.
All I/O are forced by the Reset in bidirectional, high
impedance output due to the lack of physical pull-
up except P5.0 (refer to the Reset section) which
is forced into the "Push-Pull Alternate Function"
mode until being reconfigured by software.
Warning
When a common pin is declared to be connected
to an alternate function input and to an alternate
function output, the user must be aware of the fact
that the alternate function output signal always in-
puts to the alternate function module declared as
input.
When any given pin is declared to be connected to
a digital alternate function input, the user must be
aware of the fact that the alternate function input is
always connected to the pin. When a given pin is
declared to be connected to an analog alternate
function input (ADC input for example) and if this
pin is programmed in the "AF-OD" mode, the digit-
al input path is disconnected from the pin to pre-
vent any DC consumption.
Table 3. I/O Port Characteristics
Legend: OD = Open Drain, AF = Alternate Function
Input
Output
Weak Pull-Up
Reset State
Port 0[7:0]
TTL/CMOS
Push-Pull/OD
No
Bidirectional
Port 2.0
Port 2[3:1]
Port 2[5:4]
Port 2[7:6]
Schmitt trigger
TTL/CMOS
Schmitt trigger
TTL/CMOS
Push-Pull/OD
No
Bidirectional
Port 3.0
Port 3.1
Port 3.2
Port 3[6:3]
Port 3.7
Schmitt trigger
TTL/CMOS
Schmitt trigger
TTL/CMOS
Push-Pull/OD
No
Bidirectional
Port 4.[1:0]
Port 4.[7:2]
Schmitt trigger
TTL/CMOS
Push-Pull/OD
No
Bidirectional
Port 5.0
Port 5[6:1]
TTL/CMOS
Push-Pull/OD
No
Push-Pull AF Out
Bidirectional