参数资料
型号: STR750FV2H6
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 48 MHz, RISC MICROCONTROLLER, PBGA100
封装: 10 X 10 MM, 1.70 MM HEIGHT, ROHS COMPLIANT, LFBGA-100
文件页数: 36/84页
文件大小: 1656K
代理商: STR750FV2H6
STR750Fxx STR751Fxx STR752Fxx STR755Fxx
Electrical parameters
Subject to general operating conditions for VDD_IO, and TA
Table 16.
Dual supply supply typical power consumption in Run, WFI, Slow and
Slow-WFI modes
To calculate the power consumption in Dual supply mode, refer to the values given in Table 15. and
consider that this consumption is split as follows:
IDD(single supply)~IDD(dual supply)= IDD_V18 + IDD(VDD_IO)
For 3.3V range: IDD(VDD_IO) ~ 1 to 2 mA
For 5V range: IDD(VDD_IO) ~ 2 to 3 mA
Therefore most of the consumption is sunk on the V18 power supply
This formula does not apply in STOP and STANDBY modes, refer to Table 17.
Table 17.
Typical power consumption in STOP and STANDBY modes
Symbol
Parameter
Conditions
3.3V
Typ(1)
5V
Typ(2)
Unit
IDD
(3)
Supply current
in STOP
mode(4)
LP_PARAM bits: ALL OFF(5)
12
15
μA
LP_PARAM bits : MVREG ON, OSC4M OFF, FLASH
OFF(6)
130
135
LP_PARAM bits: MVREG ON, OSC4M ON , FLASH
1950
1930
LP_PARAM bits: MVREG ON, OSC4M OFF, FLASH ON (6)
630
635
LP_PARAM bits: MVREG ON, OSC4M ON, FLASH ON (6)
2435
2425
Supply current
in STOP
mode(7)
LPPARAM bits: ALL OFF, with V18=1.8 V
IDD_V18
IDD_V33
5
<1
5
<1
μA
LP_PARAM bits: OSC4M ON, FLASH OFF
IDD_V18
IDD_V33
410
1475
410
1435
LP_PARAM bits: OSC4M OFF, FLASH ON
IDD_V18
IDD_V33
550
<1
550
1
LP_PARAM bits: OSC4M ON, FLASH ON
IDD_V18
IDD_V33
910
1475
910
1445
Supply current
in STANDBY
RTC OFF
11
14
μA
RTC ON clocked by OSC32K
14
18
1.
Typical data are based on TA=25°C, VDD_IO=3.3 V and V18=1.8 V unless otherwise indicated in the table.
2.
Typical data are based on TA=25°C, VDD_IO=5.0 V and V18=1.8 V unless otherwise indicated in the table.
3.
The conditions for these consumption measurements are described at the beginning of Section 6.3.4 on page 36.
4.
Single supply scheme see Figure 12.
5.
In this mode, the whole digital circuitry is powered internally by the LPVREG at approximately 1.4 V, which significantly
reduces the leakage currents.
6.
In this mode, the whole digital circuitry is powered internally by the MVREG at 1.8 V.
7.
Dual supply scheme see Figure 13.
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