参数资料
型号: STR750FV2H6
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 48 MHz, RISC MICROCONTROLLER, PBGA100
封装: 10 X 10 MM, 1.70 MM HEIGHT, ROHS COMPLIANT, LFBGA-100
文件页数: 47/84页
文件大小: 1656K
代理商: STR750FV2H6
STR750Fxx STR751Fxx STR752Fxx STR755Fxx
Electrical parameters
6.3.7
EMC characteristics
Susceptibility tests are performed on a sample basis during product characterization.
Functional EMS (electro magnetic susceptibility)
Based on a simple running application on the product (toggling 2 LEDs through I/O ports),
the product is stressed by two electro magnetic events until a failure occurs (indicated by the
LEDs).
ESD: Electro-Static Discharge (positive and negative) is applied on all pins of the
device until a functional disturbance occurs. This test conforms with the IEC 1000-4-2
standard.
FTB: A Burst of Fast Transient voltage (positive and negative) is applied to VDD and
VSS through a 100pF capacitor, until a functional disturbance occurs. This test
conforms with the IEC 1000-4-4 standard.
A device reset allows normal operations to be resumed. The test results are given in the
table below based on the EMS levels and classes defined in application note AN1709.
Designing hardened software to avoid noise problems
EMC characterization and optimization are performed at component level with a typical
application environment and simplified MCU software. It should be noted that good EMC
performance is highly dependent on the user application and the software in particular.
Therefore it is recommended that the user applies EMC software optimization and
prequalification tests in relation with the EMC level requested for his application.
Software recommendations:
The software flowchart must include the management of runaway conditions such as:
Corrupted program counter
Unexpected reset
Critical Data corruption (control registers...)
Prequalification trials:
Most of the common failures (unexpected reset and program counter corruption) can be
reproduced by manually forcing a low state on the RESET pin or the Oscillator pins for 1
second.
To complete these trials, ESD stress can be applied directly on the device, over the range of
specification values. When unexpected behaviour is detected, the software can be
hardened to prevent unrecoverable errors occurring (see application note AN1015).
Table 28.
EMC characteristics
Symbol
Parameter
Conditions
Level/
Class
VFESD
Voltage limits to be applied on any I/O pin to
induce a functional disturbance
VDD_IO=3.3 V or 5 V,
TA=+25° C, fCK_SYS=32 MHz
conforms to IEC 1000-4-2
Class A
VEFTB
Fast transient voltage burst limits to be applied
through 100pF on VDD and VSS pins to induce
a functional disturbance
VDD_IO=3.3 V or 5 V,
TA=+25° C, fCK_SYS=32 MHz
conforms to IEC 1000-4-4
Class A
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