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参数资料
| 型号： | TC55VBM316ATGN40 |
| 元件分类： | SRAM |
| 英文描述： | 512K X 16 STANDARD SRAM, 55 ns, PDSO48 |
| 封装： | 12 X 20 MM, 0.50 MM PITCH, PLASTIC, TSOP1-48 |
| 文件页数： | 11/15页 |
| 文件大小： | 209K |
| 代理商： | TC55VBM316ATGN40 |
TC55VBM316ATGN/ASGN40,55
2002-05-14
5/15
AC CHARACTERISTICS AND OPERATING CONDITIONS
(Ta
==== 40° to 85°C, VDD ==== 2.7 to 3.6 V)
READ CYCLE
TC55VBM316ATGN/ASGN
40
55
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNIT
tRC
Read Cycle Time
40
55
tACC
Address Access Time
40
55
tCO1
Chip Enable(
1
CE
) Access Time
40
55
tCO2
Chip Enable(CE2) Access Time
40
55
tOE
Output Enable Access Time
25
30
tBA
Data Byte Control Access Time
40
55
tCOE
Chip Enable Low to Output Active
5
5
tOEE
Output Enable Low to Output Active
0
0
tBE
Data Byte Control Low to Output Active
5
5
tOD
Chip Enable High to Output High-Z
20
25
tODO
Output Enable High to Output High-Z
20
25
tBD
Data Byte Control High to Output High-Z
20
25
tOH
Output Data Hold Time
10
10
ns
WRITE CYCLE
TC55VBM316ATGN/ASGN
40
55
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNIT
tWC
Write Cycle Time
40
55
tWP
Write Pulse Width
30
40
tCW
Chip Enable to End of Write
35
45
tBW
Data Byte Control to End of Write
35
45
tAS
Address Setup Time
0
0
tWR
Write Recovery Time
0
0
tODW
R/W Low to Output High-Z
20
25
tOEW
R/W High to Output Active
0
0
tDS
Data Setup Time
20
25
tDH
Data Hold Time
0
0
ns
Note:
tOD, tODO, tBD and tODW are specified in time when an output becomes high impedance, and are not judged depending on
an output voltage level.
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