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参数资料
| 型号： | TFP501PZP |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封装： | 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, HTQFP-100 |
| 文件页数： | 4/24页 |
| 文件大小： | 373K |
| 代理商： | TFP501PZP |
TFP501
PanelBus HDCP DIGITAL RECEIVER
SLDS127B JULY 2001 REVISED AUGUST 2002
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
fundamental operation
The TFP501 is a DVI digital receiver that is used in digital display systems to receive and decode T.M.D.S.
encoded RGB pixel data streams. High-bandwidth digital content protection (HDCP) receiver functionality
provides decryption of the DVI input data streams encrypted at the transmitter, such as TI’s TFP510 HDCP
transmitter, to prevent unauthorized viewing or coping of digital content. In a digital display system a host,
usually a PC or consumer electronics device, contains a DVI compatible transmitter that receives 24-bit pixel
data along with appropriate control signals. The HDCP TFP510 transmitter encrypts and encodes the signals
into a high-speed, low-voltage, differential serial bit stream optimized for transmission over a twisted-pair cable
to a display device. The display device, usually a flat-panel monitor, requires a DVI and HDCP compatible
receiver like the TI TFP501 to decode and decrypt the serial bit stream back to the same 24-bit pixel data and
control signals that originated at the host. This decoded data can then be applied directly to the flat panel drive
circuitry to produce an image on the display. Since the host and display can be separated by distances up to
five meters or more, serial transmission of the pixel data is preferred. To support modern display resolutions
up to UXGA, a high-bandwidth receiver with good jitter and skew tolerance is required.
T.M.D.S. pixel data and control signal encoding
T.M.D.S. stands for transition minimized differential signaling. Only one of two possible T.M.D.S. characters for
a given pixel is transmitted at a given time. The transmitter keeps a running count of the number of ones and
zeros previously sent, transmits the character that minimizes the number of transitions, and approximates a dc
balance of the transmission line.
Three T.M.D.S. channels are used to receive RGB pixel data during active display time, DE = High. These same
three channels are also used to receive HSYNC, VSYNC, CTL3, and two user definable control signals,
CTL[2:1], during inactive display or blanking interval (DE = Low). The following table maps the received input
data to the appropriate T.M.D.S. input channel in a DVI-compliant system.
RECEIVED PIXEL DATA
ACTIVE DISPLAY DE = HIGH
T.M.D.S. INPUT CHANNEL
Output Pins
(Valid for DE = High)
Red[7:0]
Channel – 2 (Rx2
±)
QE[23:16] QO[23:16]
Green[7:0]
Channel – 1 (Rx1
±)
QE[15:8] QO[15:8]
Blue[7:0]
Channel – 0 (Rx0
±)
QE[7:0] QO[7:0]
RECEIVED CONTROL DATA
BLANKING DE = LOW
T.M.D.S. INPUT CHANNEL
OUTPUT PINS
(VALID FOR DE = LOW)
CTL[3:2] (see Note 13)
Channel – 2 (Rx2
±)
CTL2
CTL[1:0] (see Note 13)
Channel – 1 (Rx1
±)
CTL1
HSYNC, VSYNC
Channel – 0 (Rx0
±)
HSYNC, VSYNC
NOTE 14: Some DVI transmitters transmit a CTL0 signal. The TFP501 decodes and transfers CTL[2:1] and ignores CTL0 characters. CTL3
is used internally to enable HDCP decryption. CTL3 and CTL0 are not available as TFP501 outputs.
The TFP501 discriminates between valid pixel T.M.D.S. characters and control T.M.D.S. characters to
determine the state of active display vs blanking, i.e., state of DE.
high-bandwidth digital content protection (HDCP) overview
TI’s HDCP transmitters and receivers use up to three cipher engines to protect information that may be
externally accessible to the user.
The downstream encryption described in the specification high-bandwidth digital content protection system
Revision 1.0 is used to protect video data passing from the HDCP transmitter to the HDCP receiver via a DVI
link. The HDCP transmitter encrypts video data and the receiver decrypts the data as shown in Figure 13.
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