
SPNS108B – AUGUST 2005 – REVISED MAY 2008 ......................................................................................................................................................... www.ti.com
Flash Pipeline Mode
When in pipeline mode, the flash operates with a system clock frequency of up to 60 MHz (versus a system
clock in normal mode of up to 30 MHz). Flash in pipeline mode is capable of accessing 64-bit words and
provides two 32-bit pipelined words to the CPU. Also in pipeline mode, the flash can be read with no wait states
when memory addresses are contiguous (after the initial 1-or 2-wait-state reads).
NOTE:
After a system reset, pipeline mode is disabled (ENPIPE bit [FMREGOPT.0] is a 0). In
other words, the B768 device powers up and comes out of reset in non-pipeline
mode. Furthermore, setting the flash configuration mode bit (GBLCTRL.4) will override
pipeline mode.
Flash Program and Erase
The B768 device flash contains three 256K-byte memory arrays (or banks) for a total of 768K bytes of flash and
consists of 18 sectors. These 18 sectors are sized as follows:
Table 4. B768 Flash Memory Banks and Sectors
MEMORY ARRAYS
SECTOR NO.
SEGMENT
LOW ADDRESS
HIGH ADDRESS
(OR BANKS)
0
16K Bytes
0x0000_0000
0x0000_3FFF
1
16K Bytes
0x0000_4000
0x0000_7FFF
2
32K Bytes
0x0000_8000
0x0000_FFFF
3
32K Bytes
0x0001_0000
0x0001_7FFF
4
32K Bytes
0x0001_8000
0x0001_FFFF
BANK0
(256K Bytes)
5
32K Bytes
0x0002_0000
0x0002_7FFF
6
32K Bytes
0x0002_8000
0x0002_FFFF
7
32K Bytes
0x0003_0000
0x0003_7FFF
8
16K Bytes
0x0003_8000
0x0003_BFFF
9
16K Bytes
0x0003_C000
0x0003_FFFF
0
64K Bytes
0x0004_0000
0x0004_FFFF
1
64K Bytes
0x0005_0000
0x0005_FFFF
BANK1
(256K Bytes)
2
64K Bytes
0x0006_0000
0x0006_FFFF
3
64K Bytes
0x0007_0000
0x0007_FFFF
0
64K Bytes
0x0008_0000
0x0008_FFFF
1
64K Bytes
0x0009_0000
0x0009_FFFF
BANK2
(256K Bytes)
2
64K Bytes
0x000A_0000
0x000A_FFFF
3
64K Bytes
0x000B_0000
0x000B_FFFF
The minimum size for an erase operation is one sector. The maximum size for a program operation is one 16-bit
word. For more detailed information on flash program and erase operations, see the TMS470R1x Flash
NOTE:
The flash external pump voltage (VCCP ) is required for all operations (program, erase,
and read).
HET RAM
The B768 device contains HET RAM. The HET RAM has a 128-instruction capability. The HET RAM is
configurable by the SYS module to be addressed within the range of 0x0000_0000 to 0xFFE0_0000. The HET
RAM is addressed through memory select 4.
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Copyright 2005–2008, Texas Instruments Incorporated