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参数资料
| 型号： | TPS24713DGSR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PDSO10 |
| 封装： | GREEN, PLASTIC, MSOP-10 |
| 文件页数： | 17/34页 |
| 文件大小： | 2148K |
| 代理商： | TPS24713DGSR |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页当前第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页
ON
t
=
2
OUT
VCC(MAX)
OUT
VCC(MAX)
OUT
LIM
VCC(MAX)
2
LIM
C
V
C
V
C
P
if
P
I
V
2 P
I
2 I
+
-
<
OUT
VCC(MAX)
LIM
VCC(MAX)
LIM
C
V
if
P
I
V
I
>
(
)
(
)2
ON
2
therefore,
470 F
12 V
470 F 29.3 W
470 F 12 V
t
0.614 ms
2 29.3 W
12 A
2
12 A
=
+
-
=
ISS
FLT
ON
GATE
FLT
6 V C
t
,
I
therefore,
6 V 2040 pF
t
0.614 ms
1.23 ms
20 A
=
+
=
+
=
T
FLT
T
10 A
C =
t
,
1.35 V
therefore,
10 A
C =
7 ms
52 nF
1.35 V
=
SLVSAL2C
– JANUARY 2011 – REVISED MAY 2011
The maximum output voltage rise time, tON, set by the timer capacitor CT must suffice to fully charge the load
capacitance COUT without triggering the fault circuitry. Equation 9 defines tON for two possible inrush cases.
Assuming that only the load capacitance draws current during start-up,
(9)
The next step is to determine the minimum fault-timer period. In Equation 9, the output rise time is tON. This is the
amount of time it takes to charge the output capacitor up to the final output voltage. However, the fault timer uses
the difference between the input voltage and the gate voltage to determine if the TPS24710/11/12/13 is still in
inrush limit. The fault timer continues to run until VGS rises 6 V (for VVCC = 12 V) above the input voltage. Some
additional time must be added to the charge time to account for this additional gate voltage rise. The minimum
fault time can be calculated using Equation 10,
(10)
where CISS is the MOSFET input capacitance and IGATE is the minimum gate sourcing current of
TPS24710/11/12/13, or 20
μA. Using the example parameters in Equation 10 and the CSD16403Q5 data sheet
leads to a minimum fault time of 1.23 ms. This time is derived considering the tolerances of COUT, CISS, ILIM, PLIM,
IGATE, and VVCC(MAX). The fault timer must be set to a value higher than 1.23 ms to avoid turning off during
start-up, but lower than any maximum fault time limit determined by the SOA curve of the device.
There is a maximum time limit set by the SOA curve of the MOSFET. Referring to Figure 35, which shows the
CSD16403Q5 SOA curve at TJ = 25°C, the MOSFET can tolerate 12 A with 12 V across it for approximately
20 ms. If the junction temperature TJ is other than 25°C, then the pulse time should be scaled by a factor of
(150
°C – TJ) / (150°C – 25°C). Therefore, the fault timer should be set between 1.23 ms and 20 ms. For this
example, we will select 7 ms to allow for variation of system parameters such as temperature, load, component
tolerance, and input voltage. The timing capacitor is calculated in Equation 4 as 52 nF. Selecting the next-highest
standard value, 56 nF, yields a 7.56-ms fault time (see Equation 11).
(11)
24
Copyright
2011, Texas Instruments Incorporated
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