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参数资料
| 型号： | TPS2540RTET |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC16 |
| 封装： | GREEN, PLASTIC, WQFN-16 |
| 文件页数： | 34/37页 |
| 文件大小： | 999K |
| 代理商： | TPS2540RTET |
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SLVSAG2A
– OCTOBER 2010 – REVISED APRIL 2011
ELECTRICAL CHARACTERISTICS (continued)
Conditions are -40
≤ TJ ≤ 125°C unless otherwise noted. VEN (if TPS2540 or TPS2540A) = VDSC (if TPS2541) = VIN = 5 V,
RFAULT = 10 kΩ, RILIM0 = 210 kΩ, RILIM1 = 20 kΩ, ILIM_SEL = 0 V, CTL1 = CTL2 = GND, CTL3 = VIN (TPS2540/40A) or CTL3 =
GND (TPS2541), unless otherwise noted. Positive currents are into pins. Typical values are at 25
°C. All voltages are with
respect to GND unless otherwise noted.
PARAMETER
TEST CONDITIONS(1)
MIN
TYP
MAX
UNIT
DCP Shorted Mode Charger Interface
DP_IN/DM_IN shorting
RDPM_short
CTLx configured for DCP BC1.2
125
200
Ω
resistance
Discharge resistance
RDCHG_PW
DM_IN and DP_IN to
CTLx configured for DCP BC1.2
2
3.2
6
M
Ω
GND
Divider Mode Charger Interface
VDP_AM
DP_IN output voltage
1.9
2
2.1
V
VDM_AM
DM_IN output voltage
2.57
2.7
2.84
CTLx configured for divider mode
ZOUT_DP
DP_IN output impedance
8
10
12.5
k
Ω
ZOUT_DM
DM_IN output impedance
8
10
12.5
CDP Interface
Voltage source on
VDM_SRC
VDP_IN = 0.6 V, CTLx configured for CDP
0.5
0.6
0.7
DM_IN for CDP detect
V
DP_IN rising voltage
VDAT_REF
threshold to activate
0.25
0.4
VDM_SRC
VDAT_REF hysteresis
50
mV
IDM_IN = - 250 A, CTLx configured for CDP
DP_IN rising voltage
VLGC_SRC
threshold to deactivate
0.8
1
V
VDM_SRC
VLGC_SRC hysteresis
100
mV
IDP_SINK
DP_IN sink current
0.4 V
≤VDP_IN ≤ 0.8 V, CTLx configured for CDP operation
50
150
A
Timings
DM_IN voltage source
From VDP_IN = 0 -> 0.6 V to VDM_IN = VDM_SRC , CTLx
tVDMSRC_EN
1
10
enable time, CDP mode
configured for CDP
DM_IN voltage source
From VDP_IN = 0.6 V -> 0 V to VDM_IN = 0 V, CTLx configured
tVDMSRC_DIS
10
disable time, CDP mode
for CDP
ms
Time for OUT to be
reapplied after VOUT falls
Any transition to and from CDP, or to and from SDP. Also
tVBUS_REAPP
200
500
below 0.7 V during
during Auto-detect to shorted mode.
discharge
Timing Requirements
Session valid (IN high) to
tSLVD_CON_P
TPS2540/TPS2541
1
VDP_SRC in DCP mode
s
When VBUS is high, (TPS2540, TPS2541)
0.9
Low DP_IN period in
tDCPLOW
DCP mode
When VBUS is high, (TPS2540A)
9
6
Copyright
2010–2011, Texas Instruments Incorporated
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