参数资料
型号: TPS54326RGTT
厂商: Texas Instruments
文件页数: 5/29页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 3A 16QFN
标准包装: 250
系列: SWIFT™, D-CAP2™
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.76 V ~ 5.5 V
输入电压: 2 V ~ 18 V
PWM 型: 混合物
频率 - 开关: 700kHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-VFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 16-QFN-EP(3x3)
RGT PACKAGE
(TOP VIEW)
SLVSA13E – OCTOBER 2009 – REVISED JUNE 2012
16
15
14
13
VFB
1
12
VBST
VREG5
2
EXPOSED
11
SW3
THERMAL
PAD
SS
GND
3
4
10
9
SW2
SW1
5
6
7
8
PIN FUNCTIONS
NAME
VO
VFB
VREG5
SS
GND
PG
EN
PGND1,
PGND2
SW1, SW2
VBST
VIN
VCC
PIN
PWP 14
1
2
3
4
5
6
7
8, 9
10, 11
12
13
14
RGT 16
16
1
2
3
4
5
6
7, 8
9, 10, 11
12
13, 14
15
DESCRIPTION
Connect to output of converter. This pin is used for On-Time Adjustment.
Converter feedback input. Connect with feedback resistor divider.
5.5 V power supply output. A capacitor (typical 1 μ F) should be connected to GND.
Soft-start control. A external capacitor should be connected to GND.
Signal ground pin
Open drain power good output
Enable control input
Ground returns for low-side MOSFET. Also serve as inputs of current comparators. Connect PGND
and GND strongly together near the IC.
Switch node connection between high-side NFET and low-side NFET. Also serve as inputs to current
comparators.
Supply input for high-side NFET gate driver (boost terminal). Connect capacitor from this pin to
respective SW1, SW2 terminals. An internal PN diode is connected between VREG5 to VBST pin.
Power input and connected to high side NFET drain
Supply input for 5 V internal linear regulator for the control circuitry
Exposed
Thermal
Pad or
PowerPAD
Back
side
Back
side
Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Should be
connected to PGND.
?
Copyright ? 2009–2012, Texas Instruments Incorporated
Product Folder Link(s) : TPS54326
5
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