参数资料
型号: TPS54550PWPRG4
厂商: Texas Instruments
文件页数: 17/31页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 6A 16HTSSOP
产品培训模块: Understanding SWIFT Step Down Dc/Dc Converters
标准包装: 2,000
系列: SWIFT™
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.9 V ~ 12 V
输入电压: 4.5 V ~ 20 V
频率 - 开关: 250kHz,500kHz
电流 - 输出: 6A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 16-HTSSOP
配用: 296-19743-ND - EVALUATION MODULE FOR TPS54550
www.ti.com
SLVS623A – MARCH 2006 – REVISED APRIL 2006
Minimum recommended thermal vias: 4 x 0.013 dia. Inside
exposed PowerPAD area and 4 x 0.013 dia. Under device as
shown. Additional vias may be used if top side ground area is extended.
Minimum recommended exposed copper
area for PowerPAD. Some stencils may
require 10 percent larger area.
0.013 DIA
8 PL
0.040
Minimum recommended top
side Analog Ground area.
0.230
0.134
Connect Pin 10 AGND and Pin 11 PGND
to Analog Ground plane in this area for
optimum performance.
0.080
Figure 27. Thermal Considerations for PowerPAD Layout
MODEL FOR LOOP RESPONSE
Figure 28 shows an equivalent model for the
TPS54550 control loop which can be modeled in a
circuit simulation program to check frequency
response and dynamic load response. The error
amplifier in the TPS54550 is a voltage amplifier with
80 dB (10000 V/V) of open-loop gain. The error
amplifier can be modeled using an ideal
voltage-controlled current source as shown in
Figure 28 with a resistor and capacitor on the output.
The TPS54550 device has an integrated feed
forward compensation circuit which eliminates the
impact of the input voltage changes to the overall
loop transfer function.
The feed forward gain is modeled as an ideal
voltage- controlled voltage source with a gain of 8
V/V. The 1-mV ac voltage between nodes a and b
effectively breaks the control loop for the frequency
response measurements. Plotting b/c shows the
small-signal response of the power stage. Plotting
c/a shows the small-signal response of the frequency
compensation. Plotting a/b shows the small-signal
response of the overall loop. The dynamic load
response can be checked by replacing the R L with a
current source with the appropriate load step
amplitude and step rate in a time domain analysis.
17
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