- 您现在的位置：买卖IC网 > PDF目录365968 > TSB14AA1 FPGA (Field-Programmable Gate Array) PDF资料下载
参数资料
| 型号： | TSB14AA1 |
| 英文描述： | FPGA (Field-Programmable Gate Array) |
| 中文描述： | 电机及电子学工程师联合会1394-1995。 3.3。 1-port.50/100Mbps。底板PHY |
| 文件页数： | 32/35页 |
| 文件大小： | 224K |
| 代理商： | TSB14AA1 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页当前第32页第33页第34页第35页
6
–
12
6.4.2
Fair Arbitration
When using this arbitration class, an active node can send an asynchronous packet exactly once each fairness
interval. Once a subaction gap is detected, a node can begin arbitration when its Arbitration_Enable signal is set. The
Arbitration_Enable signal is set at the beginning of the fairness interval and is cleared when the node successfully
accesses the bus through fair arbitration. This disables further fair arbitration attempts by that node for the remainder
of the fairness interval. In the absence of urgent nodes, a fairness interval ends once all of the nodes attempting fair
arbitration have successfully accessed the bus. At this time, all of the fair nodes have their Arbitration_Enable signals
reset and cannot arbitrate for the bus. The bus remains idle until an arbitration reset gap occurs. Once this happens,
the next fairness interval begins. All of the nodes set their Arbitration_Enable signal and can begin to arbitrate for the
bus. This process is illustrated in Figure 6
–
10.
arb
arb
arb
arb
Node A
Node B
Node C
Clear When Node Wins Arbitration
Set at Arbitration Reset Gap
Note: Arbitration Number of A > B > C
Fairness Interval N
Fairness
Interval N
–
1
Fairness
Interval N+1
Node A
Node B
Node B
A
A
A
Figure 6
–
10. Fair Arbitration Timing
NOTE:
A node sending a concatenated subaction does not reset its Arbitration_Enable bit.
6.4.3
Urgent Arbitration
The backplane environment enhances the fair priority algorithm by splitting access opportunities among nodes based
on two priority classes: fair and urgent. Nodes using an urgent priority can use up to three-fourths of the access
opportunities, with the remaining equally shared among nodes using the fair priority. All nodes are required to
implement the fair priority class, while the urgent priority class is optional. Packets are labeled as urgent when that
priority class is used.
The fair/urgent allocation uses the same fairness interval described in fair arbitration but accompanies the
Arbitration_Enable flag with an Urgent_Count. The fair/urgent method works as follows:
When the bus is idle for longer than an arbitration reset gap, a fairness interval begins and all nodes set
their Arbitration_Enable flags, while nodes implementing urgent priority set their Urgent_Count to three.
A node that is waiting to send a packet using the fair priority class should begin arbitrating after detecting
a subaction gap as long as its Arbitration _Enable flag is set. When its Arbitration_Enable flag is cleared,
it waits for an arbitration reset gap before it begins arbitrating. When such a node wins an arbitration contest,
it sends a packet without the urgent label and its Arbitration_Enable flag is cleared.
A node that is waiting to send a packet with urgent priority begins arbitrating after detecting a subaction gap
if its Urgent_Count is nonzero. When its Urgent_Count is zero, it waits for an arbitration reset gap before
it begins arbitrating. Whenever such a node wins an arbitration contest, it sends a packet with the urgent
label.
相关PDF资料 |
PDF描述 |
|---|---|
| TSB14AA1I | FPGA (Field-Programmable Gate Array) |
| TSB14AA1T | FPGA (Field-Programmable Gate Array) |
| TSB14C01MHV | IC APEX 20KE FPGA 160K 484-FBGA |
| TSB14C01HV | 5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER |
| TSB21LV03MHV | IC APEX 20KE FPGA 200K 484-FBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TSB14AA1A | 制造商:TI 制造商全称:Texas Instruments 功能描述:3.3 V IEEE 1394-1995 BACKPLANE PHY |
| TSB14AA1AI | 制造商:TI 制造商全称:Texas Instruments 功能描述:3.3 V IEEE 1394-1995 BACKPLANE PHY |
| TSB14AA1AIPFB | 功能描述:1394 接口集成电路 IEEE139419953.3V1prt 50/100Mbps BkplnPHY RoHS:否 制造商:Texas Instruments 类型:Link Layer Controller 工作电源电压: 封装 / 箱体:LQFP 封装:Tray |
| TSB14AA1AIPFBG4 | 功能描述:1394 接口集成电路 3.3V 1-port 50/100 Mbps Backplane PHY RoHS:否 制造商:Texas Instruments 类型:Link Layer Controller 工作电源电压: 封装 / 箱体:LQFP 封装:Tray |
| TSB14AA1APFB | 功能描述:1394 接口集成电路 3.3V 1-port 50/100 Mbps Backplane PHY RoHS:否 制造商:Texas Instruments 类型:Link Layer Controller 工作电源电压: 封装 / 箱体:LQFP 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。