参数资料
型号: TSB41BA3AIGGM
厂商: Texas Instruments, Inc.
英文描述: IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER
中文描述: 的IEEE 1394b三端口电缆收发器/仲裁者
文件页数: 19/66页
文件大小: 895K
代理商: TSB41BA3AIGGM
SLLS618B JUNE 2004 REVISED AUGUST 2004
19
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of operating conditions (unless otherwise noted)
(continued)
thermal characteristics
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
R
θ
JA
Junction-to-free-air thermal resistance
Board mounted, no air flow, high conductivity Texas
Instruments recommended test board, chip soldered or
greased to thermal land with 2 oz. copper.
19.04
°
C/W
R
θ
JC
Junction-to-case-thermal resistance
0.17
°
C/W
R
θ
JA
Junction-to-free-air thermal resistance
Board mounted, no air flow, high conductivity Texas
Instruments recommended test board with thermal land
but no solder or grease thermal connection to thermal
land with 2 oz. copper.
31.52
°
C/W
R
θ
JC
Junction-to-case-thermal resistance
0.17
°
C/W
R
θ
JA
R
θ
JC
R
θ
JA
Junction-to-free-air thermal resistance
Board mounted, no air flow, high conductivity JEDEC test
board with 1 oz. copper
49.17
°
C/W
°
C/W
°
C/W
Junction-to-case-thermal resistance
3.11
Junction-to-free-air thermal resistance
Two-sided JEDEC test card, no air flow
52.66
switching characteristics
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
tr
tf
tsu
TP differential rise time, transmit
10% to 90%,
At 1394 connector
0.3
0.8
ns
TP differential fall time, transmit
90% to 10%,
At 1394 connector
0.3
0.8
ns
Setup time, CTL0, CTL1, D1D7, LREQ to
PCLK
1394a-2000
50% to 50%,
See Figure 2
2.5
ns
th
Hold time, CTL0, CTL1, D1D7, LREQ
after PCLK
1394a-2000
50% to 50%,
See Figure 2
0
ns
tsu
Setup time, CTL0, CTL1, D1D7, LREQ to
LCLK_PMC
1394b
50% to 50%,
See Figure 2
2.5
ns
th
Hold time, CTL0, CTL1, D1D7, LREQ
after LCLK_PMC
1394b
50% to 50%,
See Figure 2
0
ns
td
Delay time, PCLK to CTL0, CTL1, D1D7,
PINT
1394a-2000
and 1394b
50% to 50%,
See Figure 3
0.5
7
ns
PARAMETER MEASUREMENT INFORMATION
TPAx+
TPBx+
TPAx
TPBx
56
Figure 1. Test Load Diagram
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