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| 型号： | TSB41BA3AIGGM |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER |
| 中文描述： | 的IEEE 1394b三端口电缆收发器/仲裁者 |
| 文件页数： | 36/66页 |
| 文件大小： | 895K |
| 代理商： | TSB41BA3AIGGM |
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SLLS618B JUNE 2004 REVISED AUGUST 2004
36
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION (1394a-2000 INTERFACE)
The TSB41BA3A is designed to operate with an LLC such as the Texas Instruments TSB12LV21B, TSB12LV26,
TSB12LV32, TSB42AA4, or TSB12LV01B when the BMODE terminal is tied low. Details of operation for the
Texas Instruments LLC devices are found in the respective LLC data sheets. The following paragraphs describe
the operation of the PHY-LLC interface. This interface is formally defined in IEEE 1394a-2000, Section 5A.
The interface to the LLC consists of the PCLK, CTL0CTL1, D0D7, LREQ, LPS, and S5_LKON terminals on
the TSB41BA3A, as shown in Figure 12.
S5_LKON
LPS
PCLK (SYSCLK)
LREQ
D0–D7
CTL0–CTL1
Link-Layer
Controller
TSB41BA3A
Figure 12. PHY-LLC Interface
The PCLK terminal provides a 49.152-MHz interface system clock. All control and data signals are synchronized
to and sampled on the rising edge of PCLK. This terminal serves the same function as the SYSCLK terminal
of 1394a-2000 compliant PHY devices.
The CTL0 and CTL1 terminals form a bidirectional control bus, which controls the flow of information and data
between the TSB41BA3A and LLC.
The D0D7 terminals form a bidirectional data bus, which transfers status information, control information, or
packet data between the devices. The TSB41BA3A supports S100, S200, and S400 data transfers over the
D0D7 data bus. In S100 operation only the D0 and D1 terminals are used; in S200 operation only the D0D3
terminals are used; and in S400 operation all D0D7 terminals are used for data transfer. When the TSB41BA3A
is in control of the D0D7 bus, unused Dn terminals are driven low during S100 and S200 operations. When
the LLC is in control of the D0D7 bus, unused Dn terminals are ignored by the TSB41BA3A.
The LREQ terminal is controlled by the LLC to send serial service requests to the PHY in order to request access
to the serial-bus for packet transmission, read or write PHY registers, or control arbitration acceleration.
The LPS and S5_LKON terminals are used for power management of the PHY and LLC. The LPS terminal
indicates the power status of the LLC and may be used to reset the PHY-LLC interface or to disable PCLK. The
S5_LKON terminal sends a wake-up notification to the LLC or external circuitry and indicates an interrupt to the
LLC when either LPS is inactive or the PHY register L bit is 0.
The TSB41BA3A normally controls the CTL0CTL1 and D0D7 bidirectional buses. The LLC is allowed to drive
these buses only after the LLC has been granted permission to do so by the PHY.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TSB41BA3AIPFP | 功能描述:缓冲器和线路驱动器 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| TSB41BA3APFP | 功能描述:缓冲器和线路驱动器 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| TSB41BA3APFPG4 | 功能描述:1394 接口集成电路 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Texas Instruments 类型:Link Layer Controller 工作电源电压: 封装 / 箱体:LQFP 封装:Tray |
| TSB41BA3ATPFPEP | 功能描述:缓冲器和线路驱动器 Mil Enh 3-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| TSB41BA3B | 制造商:TI 制造商全称:Texas Instruments 功能描述:IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER |
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