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参数资料
| 型号： | TSC2300IPAGRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封装： | GREEN, PLASTIC, TQFP-64 |
| 文件页数： | 27/83页 |
| 文件大小： | 1268K |
| 代理商： | TSC2300IPAGRG4 |
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TSC2300
SLAS372 — NOVEMBER 2002
Keypad De-bounce Control (continued)
KBDB2
KBDB1
KBDB0
Function
1
0
De-bounce: 100 ms
1
De-bounce: 120 ms
Keypad Mask Register (Page 1, Address 10H)
The Keypad Mask register is formatted as follows:
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MSB
LSB
M15
M14
M13
M12
M11
M10
M9
M8
M7
M6
M5
M4
M3
M2
M1
M0
This is the same format as used in the keypad data register (Page 0, Address 04H). Each bit in these registers
represents one key on the keypad. In the mask register, if a bit is set (1), then that key is not detected in keypad scans.
Pressing that key on the keypad also does not cause a KBIRQ, if the bit is set. If the bit is cleared (0), the
corresponding key is detected when pressed. A 16-key keypad is mapped into the keypad mask (and keypad data)
register as shown in Table 24. The default value for this register is 0000H, detecting all key presses.
Table 24. Keypad to Key Bit Mapping.
C1
C2
C3
C4
R1
K0
K1
K2
K3
R2
K4
K5
K6
K7
R3
K8
K9
K10
K11
R4
K12
K13
K14
K15
The result of a keypad scan appears in the keypad data register. Each bit is set in this register, corresponding to the
key(s) actually pressed. For example, if only key 1 was pressed on a particular scan, the data in the register would
read as 0x0002; however, if keys 6, 8, and 13 were all pressed simultaneously on that scan, the data would read as
0x2140.
Multiple keys may be pressed simultaneously, and are generally decoded correctly by the keypad scan circuitry.
However, keys that land on three corners of a rectangle may cause a false reading of a key on the fourth corner of the
rectangle. For example, if keys 0, 3, and 11 were pressed simultaneously, the KEY0, KEY3, and KEY11 bits are set,
but the KEY8 bit is also set. Thus, when considering using multiple-key combinations in an application, try to avoid
combinations that put three keys on the corners of a rectangle.
Secondary Configuration Register (Page 1, Address 06H):
This register allows the user to read the status of the DAV pin through the SPI interface.
BIT 15
BIT 14 BIT 13 BIT 12 BIT 11 BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MSB
LSB
SDAV
X
Bit 15 — SDAV
SPI Data Available. This read-only bit mirrors the function of the DAV pin. This bit is provided so that the host
processor can poll the SPI interface to see whether data is available, without dedicating a GPIO pin from the host
processor to the TSC2300 DAV pin. This bit is normally high, goes low when touch screen or ADC data is available,
and is reset high when all the new data has been read.
Table 25. SPI Data Available
33
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