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参数资料
| 型号： | TSC2300IPAGRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封装： | GREEN, PLASTIC, TQFP-64 |
| 文件页数： | 72/83页 |
| 文件大小： | 1268K |
| 代理商： | TSC2300IPAGRG4 |
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TSC2300
SLAS372 — NOVEMBER 2002
Bit 5 OSCC
Crystal Oscillator Control. The TSC2300 includes a crystal oscillator that can be used to generate the signal needed for
the MCLK input, or any other purpose. However, it is not necessary to use the crystal oscillator. No function of the
TSC2300 requires use of the crystal oscillator
The OSCC bit in this register controls the crystal oscillator as described in Table 44.
Table 45. Crystal Oscillator Control
OSCC
DESCRIPTION
0
Crystal oscillator is off.
1
Crystal oscillator is on (default).
Bit 4 BCKC
Oscillator Clock Buffer Control. If the crystal oscillator is used to provide a clock for another part, a buffered version of
the oscillator clock can be obtained from pin 13 (GPIO_5/CLKO). The BCKC bit in this register determines whether or
not the buffered oscillator clock is driven. Note that GPIO_5 must be configured as an output for this option to fully
function.
Table 46. Oscillator Clock Buffer Control
BCKC
DESCRIPTION
0
The output clock buffer is off (default).
1
The output clock buffer is on.
Bit 3 SMPD
Synchronization Monitor Power Down. The TSC2300 contains circuitry to monitor the I2S bus LRCLK and BCLK clocks
and provide a flag to the system if they appear unsychronized. When this synchronization monitor detects a possible
out-of-sync condition, it flags the data converter, which causes them to stop and wait for the bus to resynchronize. The
SMPD bit is used to enable or disable the operation of this circuitry.
Table 47. Synchronization Monitor Power Down
SMPD
DESCRIPTION
0
The I2S bus sync monitor is on (default).
1
The I2S bus sync monitor is off.
Bit 2 OTSYN
I2S Out Of Sync. This read-only sticky bit reflects the sync status of the I2S bus. It will always reset to zero after being
read.
Table 48. I2S Out of Sync
OTSYN
DESCRIPTION
0
The I2S bus is in sync.
1
The I2S bus is out of sync (default).
Bit 1 BASS
Digital-effects filter control. This bit turns ON/OFF the digital-effects filter. If the digital-effects filter is off, the signal
passes through with no filtering performed.
Table 49. Digital-Effects Filter Control
74
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