参数资料
型号: TSC2300IPAGRG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封装: GREEN, PLASTIC, TQFP-64
文件页数: 64/83页
文件大小: 1268K
代理商: TSC2300IPAGRG4
www.ti.com
TSC2300
SLAS372 — NOVEMBER 2002
Microphone Input Gain Selection (continued)
MICG[1:0]
MICG1
MICG0
DESCRIPTION
0
MIC gain=0 dB (default)
0
1
MIC gain=0 dB
1
0
MIC gain=6 dB
1
MIC gain=12 dB
Bits [7:6] MCLK1-MCLK0
Master Clock Ratio. These two bits select the ratio of the audio master clock frequency to the audio sampling
frequency. The ratio can be 256 Fs, 384 Fs, or 512 Fs. The default master clock frequency is 256 Fs.
Table 30. Master Clock Ratio Selection
MCLK[1:0]
MCLK1
MCLK0
DESCRIPTION
0
Master clock (MCLK)=256 x Fs (default)
0
1
Master clock (MCLK)=384 x Fs
1
0
Master clock (MCLK)=512 x Fs
1
Master clock (MCLK)=256 x Fs
Bits [5:2] I2SFS3-I2SFS0
I2S Sample Rate. These bits tell the internal PLL what the audio sampling rate is so that it provides the proper clock
rate to the data converters and the digital filters. The default sample rate is 48 kHz. See Table 31 for a complete listing
of available sampling rates. All combinations of I2SFS[3:0] not in Table 31 are not valid.
Table 31. I2S Sample Rate Select
I2SFS3
I2SFS2
I2SFS1
I2SFS0
FUNCTION
0
Fs=48 kHz (default)
0
1
Fs=44.1 kHz
0
1
0
Fs=32 kHz
0
1
Fs=24 kHz
0
1
0
Fs=22.05 kHz
0
1
0
1
Fs=16 kHz
0
1
0
Fs=12 kHz
0
1
Fs=11.05 kHz
1
0
Fs=8 kHz
Bits [1:0] I2SFM1-I2SFM0
I2S Format. These two bits select the I2S interface format. Both 16-bit and 20-bit data formats are supported. The
default format is 20-bit I2S.
Table 32. I2S Format Selection
I2SFM [1:0]
I2SFM1
I2SFM0
DESCRIPTION
0
DAC: 16-bit, MSB-first, right justified ADC: 16-bit, MSB-first, left justified
0
1
DAC: 20-bit, MSB-first, right justified ADC: 20-bit, MSB-first, left justified
1
0
DAC: 20-bit, MSB-first, left justified ADC: 20-bit, MSB-first, left justified
67
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