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参数资料
| 型号： | TSC2301IZQZR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA120 |
| 封装： | GREEN, PLASTIC, VFBGA-120 |
| 文件页数： | 81/95页 |
| 文件大小： | 1322K |
| 代理商： | TSC2301IZQZR |
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TSC2301
SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004
Bit 1 — SSRTE
Volume Soft-stepping Rate Select. This bit selects the speed of the soft-stepping function of the TSC2301
volume controls. At normal speed, the actual volume is updated approximately once every 20 s. At half speed,
the actual volume is updated approximately once every 40 s.
Table 47. Volume Soft-Stepping Rate Select
SSRTE
Description
0
Normal step rate used (default).
1
Half step rate used.
Bit 0 — SSTEP
Soft-step Flag. This read-only bit indicates that the TSC2301 volume control soft-stepping is completed.
Table 48. Soft-Step Flag
SSTEP
Description
0
Soft-stepping is not complete.
1
Soft-stepping is complete (default).
AUDIO POWER CONTROL REGISTER (Page 2, Address 05H)
The audio power / miscellaneous control register of the TSC2301 controls the powering down of various audio
blocks of the TSC2301. The default state of the TSC2301 has all audio blocks powered down. Before using any
of the audio blocks, they must be powered up by writing to this register. This register also controls the crystal
oscillator clock and buffer, the bass-boost filter, and the de-emphasis filter.
The audio power / miscellaneous control register is formatted as follows:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MSB
LSB
APD
AVPD
ABPD
HAPD
MOPD
DAPD ADPD ADPD PDSTS MIBPD
OSC
BCKC
SMPD
OTSY
BASS
DEEM
L
R
C
N
P
For bits 15 through 8 of this register, writing a 1 to a selected bit powers down the affected section, writing a 0
powers up the section.
Bit 15 — APD
Audio Power Down. This bit powers down the entire audio section if set, regardless of the settings of the other
bits in this register. When this bit is cleared, the individual sections of the audio codec still need to be powered
up individually. The settings of the other bits in the register are retained when this bit is set and cleared. The
default is 1 (powered down).
Bit 14 — AVPD
Audio VCM Power Down. If this is set to 1, the VCM powers up whenever it is needed (such as when the audio
ADC, DAC, or bypass path is enabled) and powers down when no longer needed. If this bit is set to 0, after an
audio component is powered up and causes VCM to power up, it no longer powers down, even if all audio
components are powered down. This is intended to avoid the 500 s delay needed for VCM to power up slowly.
The default is 1 (powered down).
Bit 13 — ABPD
Audio Bypass Path Power Down. This is used to power up (set to 0) or power down (set to 1) the audio bypass
path. The default is 1 (powered down).
Bits 12 — HAPD
Headphone Amplifier Power Down. This is used to power up (set to 0) or power down (set to 1) the headphone
amplifier. The default is 1 (powered down).
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| TSC2302IRGZG4 | 功能描述:触摸屏转换器和控制器 Prog 4-Wire w/20-Bit Stereo Audio Codec RoHS:否 制造商:Microchip Technology 类型:Resistive Touch Controllers 输入类型:3 Key 数据速率:140 SPS 分辨率:10 bit 接口类型:4-Wire, 5-Wire, 8-Wire, I2C, SPI 电源电压:2.5 V to 5.25 V 电源电流:17 mA 工作温度:- 40 C to + 85 C 封装 / 箱体:SSOP-20 |
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